UCC28951 PSFB Controller - Sense Signal Filtering question

[Magnethicc]

Hi everyone,

We are doing a high power high current (42V input, 48V output, 5.5kW) PSFB using the UCC28951 and its Adaptive Delay feature. the lead designer wants to use 100Ohms for RLF1 as the filter resistor (of the current sense signal) instead of 1k ohms as stated in the datasheet.

Is there any objections to use 100Ohms instead of 1k?

Thank you!

 

[cupoftea]

Is there a slope compensating current coming out of CS pin?...if so, then that will determine the value of the RLF1.
Otherwise, its not RLF1, but its the combination of RLF1 and CLF that matters....as its these two that filter the leading edge spike offf the current sense signal............so basically, you need to use as light current sense filter as possible, so that you dont distort the current sense signal, but not so light that you let through the leading edge spike and other noise.

Also, it depends on your fsw.......higher fsw means lower filtration of this rc.

But you need to scope it and see.......check its filtering off the leading edge spike or not.....

 

[Easy peasy]

put 330pF to gnd on pins 6,7,8,9 right at the pin, C0G, 0603

 

[Magnethicc]

Is there a slope compensating current coming out of CS pin?...if so, then that will determine the value of the RLF1.
Otherwise, its not RLF1, but its the combination of RLF1 and CLF that matters....as its these two that filter the leading edge spike offf the current sense signal............so basically, you need to use as light current sense filter as possible, so that you dont distort the current sense signal, but not so light that you let through the leading edge spike and other noise.

Also, it depends on your fsw.......higher fsw means lower filtration of this rc.

But you need to scope it and see.......check its filtering off the leading edge spike or not.....

Slope compensation is at Pin 11.
can you elaborate on what governs the size of R and the size of C? there are infinite combination that will result in the same corner frequency but is there a rule of thumb against too small or too big of a resistor/capacitor?

put 330pF to gnd on pins 6,7,8,9 right at the pin, C0G, 0603

Is this to make the delays more stable?

Thank you for your answers!

 

[cupoftea]

can you elaborate on what governs the size of R and the size of C? there are infinite combination that will result in the same corner frequency but is there a rule of thumb against too small or too big of a resistor/capacitor?

people usually use C somewhere between 100pF and 2nF.
But it doesnt actually matter too much....then again, many woudl argue that a too big capacitor contains too much stray inductance and will cause ringing at the pin.

 

[Easy peasy]

At 42V 5.5kW ( 135A ) you'll need some pretty impressive film/foil caps across the pir fet H bridge to soak up turn off current - else you'll get volt spikes that'll kill the fets - poof ...

you'll also need some pretty impressive snubbers across Qe, Qf to handle light loads - else poof again ...

 

[Magnethicc]

At 42V 5.5kW ( 135A ) you'll need some pretty impressive film/foil caps across the pir fet H bridge to soak up turn off current - else you'll get volt spikes that'll kill the fets - poof ...

you'll also need some pretty impressive snubbers across Qe, Qf to handle light loads - else poof again ...

Why particularly in light load?
I thought at light load Qe Qf are turned on most of the time so no ringing between Xmer leakage and the MOSFET capacitance.

I'll make sure to let the lead designer know about the film capacitors recommendations.

 

[Easy peasy]

I thought at light load Qe Qf are turned on most of the time so no ringing between Xmer leakage and the MOSFET capacitance.

oh dear, has your lead designer done anything remotely similar before ... ?

 

[cupoftea]

Here attached is your 5500W PSFB in the free LTspice simulator.....you can experiment with adding different levels of leakage inductance in the transformer etc...then see how this affects the volts ringing on the output sync rects...i havent added the output sync rects yet, but feel free to do so.....you could even consider the analog part, till your confidence is ok for the ti.com

--- Updated Apr 1, 2022 ---

Also, please be sure to use SiC FETs......otherwise the PSFB's reverse recovery trick can be played out on you.

 

[Magnethicc]

oh dear, has your lead designer done anything remotely similar before ... ?

Yeah he has decades of experience with smps design, my comment is based on my knowledge alone, the words are mine not his. I was asking so I could learn as I am a junior in the field.

Here attached is your 5500W PSFB in the free LTspice simulator.....you can experiment with adding different levels of leakage inductance in the transformer etc...then see how this affects the volts ringing on the output sync rects...i havent added the output sync rects yet, but feel free to do so.....you could even consider the analog part, till your confidence is ok for the ti.com

--- Updated Apr 1, 2022 ---

Also, please be sure to use SiC FETs......otherwise the PSFB's reverse recovery trick can be played out on you.

Thank you cupoftea I will play around with the simulation!

--- Updated Apr 1, 2022 ---

Ok I think I now see what Easy Peasy meant thanks to cupoftea simulation at light load.
Please do correct me if I am wrong - at light load output inductor enters DCM and therefore resonate with the MOSFET output capacitances.
Now my question is why would that ringing cause poof?

 

[cupoftea]

[quote/] Ok I think I now see what Easy Peasy meant thanks to cupoftea simulation at light load.
Please do correct me if I am wrong - at light load output inductor enters DCM and therefore resonate with the MOSFET output capacitances.
Now my question is why would that ringing cause poof? [/quote]


The problem with light load when using sync rects, is that you can get current reversing in the output inductor, via the sync rects, and when the sync rects turn off, they break this current, and huge overvoltage spikes can thus result.
So you have to think of the handling of the sync rects in light load.
Some people use an RCD clamp around the output sync rects.

One other way is to detect output current and then disable the sync rects in light load.

There are other ways, including some sync rect driver IC's which handle it.

--- Updated Apr 1, 2022 ---

There is some relevant discussion on sync rects to be found in this course...

SMPS course_Big folders:
https://drive.google.com/file/d/17ij_pQLkAzzYeL_TRNci86sXHMirKHmD/view?usp=sharing

SMPS course_little folders:
https://drive.google.com/file/d/1WvElhDNfHI0EBei4rouSNEdWWTO1oCtJ/view?usp=sharing

 

[Magnethicc]

Thank you, your comment was very informative to me!
A while back I connected a FB DC/DC but with no bus-bars connections to the Filter board where the voltage measurement is taken (newbie mistake) so feedback increased the duty as wide as possible causing the rectifiers to turn on at no load until finally I heard a pop and indeed the sync rectifiers were dead and I didn't know why until now.

Indeed the UCC28950/1 have a DCM feature where if the CS voltage is below the voltage at DCM pin then it shuts down the rectifiers.

Downloaded the courses now - huge thanks!

 

[byjuncal]

I'm with mtwieg. Rather unlikely to see real current ringing with almost montonous voltage waveform.

What's current waveform scale factor, what kind of current probe are you using? What's the boost inverter load case?

Another thing. External parallel diode rarely improves switching behaviour of a poor internal diode.

[quote/] Ok I think I now see what Easy Peasy meant thanks to cupoftea simulation at light load.
Please do correct me if I am wrong - at light load output inductor enters DCM and therefore resonate with the MOSFET output capacitances.
Now my question is why would that ringing cause poof?

The problem with light load when using sync rects, is that you can get current reversing in the output inductor, via the sync rects, and when the sync rects turn off, they break this current, and huge overvoltage spikes can thus result.
So you have to think of the handling of the sync rects in light load.
Some people use an RCD clamp around the output sync rects.

One other way is to detect output current and then disable the sync rects in light load.

There are other ways, including some sync rect driver IC's which handle it.

--- Updated Apr 1, 2022 ---

There is some relevant discussion on sync rects to be found in this course...

SMPS course_Big folders:
https://drive.google.com/file/d/17ij_pQLkAzzYeL_TRNci86sXHMirKHmD/view?usp=sharing

SMPS course_little folders:
https://drive.google.com/file/d/1WvElhDNfHI0EBei4rouSNEdWWTO1oCtJ/view?usp=sharing
[/QUOTE]


If you have a properly setup for UCC28951, the synchronous rectification are not going to be enabled at light loads.