TTL waveshaping, RC networks

[danny davis]

The output of U8 , 3 input pin NOR GATE , Pin#6

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The Node between R39 and C9 is 8msec. shark fin waveshape


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The output of U8 pin#6 , the shark fin waveshape goes to U10 pin#6 SET input

Why is the waveshape a sharks fin? the RC network changed the waveshape from a square waveform to a shark fin

But why was the shark fin waveshape used?



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U8 going to U10

 

[danny davis]

First waveform is 1.48mS
Second waveform is the shark fin is 8msec.

Do you know why the time delay was used? for what reason?

Does the waveshape trigger the flip flop differently than a square waveform?

when using different triangle waveshapes for the inputs to logic gates or flip flops, what does it do different than using square waveforms/pulses waveshapes?

It gives you less ON time and a exponential decay OFF time

But what does that do to the logic?

Why would the logic signal source need to have a time delay RC network or a waveshaped to be triangle or shark fin to the inputs of a GATE or flip flop, etc?

 

[rfredel]

Hello Danny,

Why is the waveshape a sharks fin?

You are charging a capacitor with a resistor. In starting moment, when the input voltage goes to "high",the capacitor has no charge. The charging and discharging curves of a capacitor are exponetial fuctions.

BTW: the correct word for the waveshape is not "shark fin" it's "sawtooth".

But why was the shark fin waveshape used?

This RC - combination is a simple delay element to delay the squarewave pulse .

First waveform is 1.48mS
Second waveform is the shark fin is 8msec.

I don't believe this times, because the delay time of the RC -combination is 1ms.

Do you know why the time delay was used?

I must ask the cristal ball :lol:, because I don't know the circuit and the function of this circuit.

for what reason?

To delay the input pulse from U8 to U10

Does the waveshape trigger the flip flop differently than a square waveform?

Yes, it delays the squarewave pulse. For short delays, you can use this simple circuit, but if you have longer delay times then 10 ms it is better to use digital delays like monostable multivibrators (One-shot).

when using different triangle waveshapes for the inputs to logic gates or flip flops, what does it do different than using square waveforms/pulses waveshapes?

Sinusoidal or nosinusoidal waveshapes are not good for digital use. Flipflops or logic gates will not funktion in right way because the switching edges are indefinite. So first you must change the waveshapes into squarewave pulses with a schmitt trigger. So that was the reason I wrote before, that you can use the simple delay line only for short times.

It gives you less ON time and a exponential decay OFF time

Also the ON-time rises eponential.

But what does that do to the logic?

Long rising times and decay times makes indefinite switching point to the logic.

Why would the logic signal source need to have a time delay RC network or a waveshaped to be triangle or shark fin to the inputs of a GATE or flip flop, etc?

Time delay circuits are use to delay the input signal or to cancel the chatter of a mechanical switch. Triangel waveshapes are not use digital circuits to trigger something. Sawtooth signals are only use in simple delay lines and short delay times. The best signal is a square wave to trigger digital circuits.

I hope this helps

Regards

Rainer

 

[danny davis]

Theses are waveshapes I have seen to Trigger the RESET on flip flips and on Clocks







Using these types of waveshapes instead of squarewaves for trigger makes the switching better and it delays the trigger?

 

[rfredel]

Hello Danny,

the picture 1 shows a squarewave, but the probe of your scope is not correctly adjust. The capacitance of the probe cable is uncompensated. Look for your manual to adjust it correct.

Picture 2 and 3 shows a sawtooth with the same frequency. You only use different horizontal deflection frequencies.

You ca use all this waveforms for triggering.

Regards

Rainer

 

[danny davis]

the picture 1 shows a squarewave, but the probe of your scope is not correctly adjust. The capacitance of the probe cable is uncompensated. Look for your manual to adjust it correct.

No, The Probe is adjusted, its the waveshape from an RC network and gain that goes to a RESET pin to a flip flop or Clock

Does this waveshape, delay the trigger pulse and how so? what does it do to the trigger to have this waveshape?

Picture 2 and 3 shows a sawtooth with the same frequency. You only use different horizontal deflection frequencies.

What you mean by horizontal deflection frequencies?

You can use all these waveforms for triggering.

When using these waveforms it makes the switching better? because it delays the pulse?

 

[rfredel]

Hello Danny,

TTL devices have defined voltages for supply voltage and low and high level.

V_CC = 4,75V to 5,3V[/B]

Input LOW = 0 to 0,8V
Input High = >2V to V_CC

Output High = V_CC to 2,4V
Output Low = 0 to 0,4V


CMOS devices have also defined voltages for low and high level, but they are dependent from the supply voltage.

The following levels are for V_DD = 5V

Input LOW = 0 to 1,5V
Input High = >3,5V to V_DD

Output High = V_DD to 4,4V
Output Low = < 0,4V


The following levels are for V_DD = 15V

Input LOW = 0 to 3,0V
Input High = >7,0V to V_DD

Output High = V_DD to 9,9V
Output Low = < 0,4V

Here you see, that between the max LOW - Input level and the and the min High - Input level is an voltage area that is indefinite. In this area the out don't know, if he has to change or not. This is the reason, why squarewave or sawtooth signals are use. The slew rate must be high. Triangle or sinusodial have not enough slwe rate.

What you mean by horizontal deflection frequencies?

Horizontal deflection frequencies means the position of the timebase switch. Picture 2 has a deflection of of 10ms/div and Picture 3 has 4ms/div. So you can see that both sawtooth have the same frequency.

I hope it is clear, what I mean, else ask again.

Regards

Rainer

 

[danny davis]

Thanks for the info

The slew rate must be high. Triangle or sinusodial sine waves have not enough slew rate.

Why does the slew rate have to be high?

Why does TTL and CMOS chips need a Slew Rate as an input source?

Slew rate look like the rise time/ linear ramp of voltage or time

So a low slew rate won't be good because of why?

 

[rfredel]

Hello Danny,

Why does the slew rate have to be high?

The slew rate must be high, to change quickly from low - level to high level or back.

Why does TTL and CMOS chips need a Slew Rate as an input source?

Slew rate is not an input source, it's the time from changing high to low or back. TTL and CMOS chips are digital chips. They only know low and high stages. The voltage between max. low - level and min. high - Level is not allowed, because input and output don't know what they have to do. So you need a quick time to change between the two stages and that means a high slew rate.

So a low slew rate won't be good because of why?

Yes, it's not good. See the answer from your last question.

Regards

Rainer

 

[danny davis]

Thanks for the info.

So A sine waveform has no slew rate?

They use Non-Inverting Schmitt triggers to convert a sine wave into a square waveform.

What's the difference between using an op amp to convert a sinewave into a square waveform or using a non-inverting schmitt trigger?

I have seen circuit that use either op amp or non inverting schmitt trigger to convert a sinewave into a square waveform but what is the difference between using an op amp or using a non-inverting schmitt trigger?

 

[rfredel]

Hello danny,

So A sine waveform has no slew rate?

All waveforms and switching events have slewrates. The slew rate is the time between 2 switching points.

They use Non-Inverting Schmitt triggers to convert a sine wave into a square waveform.

It's equal if you use non - inverting Schmitt triggers or inverting. That is dependent from the use.

What's the difference between using an op amp to convert a sinewave into a square waveform or using a non-inverting schmitt trigger?

There is no difference. An Op amp can connected as a schmitt trigger. With an op amp you can better adjust the hysteresis, as with a finish IC.

Regards

Rainer

 

[danny davis]

When A schmitt trigger inverts a signal , it doesn't invert its to a negative cycle

example: +5 volts input to an inverting schmitt trigger output is zero volts not -5 volts

It just inverts the high and low stages , a schmitt trigger only has 2 state

Why do designers use a schmitt trigger if an op amp can do the same thing plus more? Does a schmitt trigger have a better slew rate or cleaner squarewaveform output?

I guess using a schmitt trigger is less resistors for R in and Feedback resistors you don't need them.

I have noticed a schmitt trigger changes an input voltage to a higher output voltage

example: input voltage is +5 volts into schmitt trigger, the schmitt triggers Vcc is +12 volts, now the output is HIGH signal is +12 volts not +5 volts anymore its +12 volts HIGH

 

[danny davis]

Is multiple Level signals be when some logic stages at low to +5 volts than other logic stages at the +5 volts and convert it using a schmitt trigger to +12 volts? so its low to +12 volts now

What is this called when they do stuff like this?

I see this often using schmitt triggers than convert the HIGH +5 volts to +12 volts

 

[rfredel]

Hello danny,

When A schmitt trigger inverts a signal , it doesn't invert its to a negative cycle
example: +5 volts input to an inverting schmitt trigger output is zero volts not -5 volts.
It just inverts the high and low stages , a schmitt trigger only has 2 state

That's right.

Why do designers use a schmitt trigger if an op amp can do the same thing plus more? Does a schmitt trigger have a better slew rate or cleaner squarewaveform output?

A schmitt trigger is a finish and cheap device, that also can use as normal gates (for example: SN 7413). An op amp needs more things around, but it's right that you can adjust the switching points and hysteresis.

I guess using a schmitt trigger is less resistors for R in and Feedback resistors you don't need them.

A finish schmitt trigger is easy to use and an op amp schmitt trigger is more than an amplifier with open loop amplification. You need negativ feedback for the amplification and positiv feedback for the slew rate.

I have noticed a schmitt trigger changes an input voltage to a higher output voltage
example: input voltage is +5 volts into schmitt trigger, the schmitt triggers Vcc is +12 volts, now the output is HIGH signal is +12 volts not +5 volts anymore its +12 volts HIGH

Don't mix level shifters with schmitt triggers. What you discribe her is a level shifter.

Is multiple Level signals be when some logic stages at low to +5 volts than other logic stages at the +5 volts and convert it using a schmitt trigger to +12 volts? so its low to +12 volts now

Here you use only level shifters, not schmitt triggers.

What is this called when they do stuff like this?

Level shifter

I see this often using schmitt triggers than convert the HIGH +5 volts to +12 volts

This circuits are level shifter, not schmitt trigger

Regards

Rainer

 

[danny davis]

Thank you for the information

A schmitt trigger is a finish and cheap device, that also can use as normal gates

What do you mean you can use a schmitt trigger as a normal gate?



So how can I "force" an input or output HIGH or LOW , without damaging the TTL or CMOS chip?

I am trying to Force it since I'm troubleshooting Logic circuits with the TTL and CMOS chips in circuit

I need to know how to "Force" a HIGH or LOW on the inputs and outputs

I don't want to use a Logic Pulsar because the Pulsar toggles from high and low , A Logic Pulsar is a squarewave output , so it's hard to troubleshoot using it.

 

[rfredel]

Hello Danny,

What do you mean you can use a schmitt trigger as a normal gate?

I think, you don't know the real function of schmitt triggers. So I give you this link from TEXAS Instruments
Also I give you a datasheet of a NAND gate with internal schmitt trigger

So how can I "force" an input or output HIGH or LOW , without damaging the TTL or CMOS chip?

If you have a gate, like a NAND gate with two inputs, you can see at the function table, that if both inputs are high, the output is low. You can only force a input chip to change the output. The inputs must not connected to other chips. In this case there will not be damage anything.

I am trying to Force it since I'm troubleshooting Logic circuits with the TTL and CMOS chips in circuit

In this case the chip before will be damage. For troubleshooting it's better to use a scope, DMM or the best, a Logic probe. Look what is the input signal and than follow this signal to the output. I know this is very hard to do and you must also know function of the circuit .

With a logic pulsar and a logic probe it is easy to control a circuit. A logic probe is a simple probe, that displays the level of the test point. You can made it yourself.

If you are interested, I can give you a circuit.

If you want, I can help you with the troubleshooting of your circuit, than send me the complete diagram.

Regards

Rainer

 

[danny davis]

This data sheet truth table im confused about
https://www.ti.com/lit/ds/symlink/sn74ahct132.pdf

1.) The truth table has an X for an input, what is the X? L means low , H means High , but what does X mean?

2.) Why did they are using schmitt triggers as the inputs before the NAND gate? only thing I can think of is that it cleans up the signal and creates fast edges

For troubleshooting it's better to use a scope, DMM or the best, a Logic probe. Look what is the input signal and than follow this signal to the output

Yes, I print out the truth tables and the datasheets per chip on the circuit board
and go from input and output, testing the input signal going to the chip and monitoring the output using an oscilloscope

When troubleshooting multiplexers, adders, counters, gates, flip flops, how do you know the signs of a bad one? or common fails you have come across with TTL and CMOS logic chips?

How would you troubleshoot multiplexers, adders, counters, gates, flip flops? just to verify they are working? how would you do it?

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Because I don't know what the signs of a bad TTL Or CMOS multiplexers, adders, counters, gates, flip flops, do when they are bad or failing ? what have you seen or come across please?

 

[danny davis]

When there is a short VCC or there is a component shorted to VCC or shorted to ground, how would you troubleshoot this?

do you use an ohm meter/ continuity checker and put the RED probe on VCC and use the black probe and go to each component on the circuit until you get a beeping sound making continuity, then you know you found a short?

My DVM meter doesn't measure milli-ohms to check for shorts

Is there a way to use an oscilloscope or a DVM meter to check for shorts? short to VCC or short to ground?

Any Techniques you use or know

 

[godfreyl]

check for shorts

oh no, not again.

See these threads:

• finding SHORTS troubshooting SHORTS
• SHORTS, voltage across resistor converts to current
• Check Transistors and FETS in circuit for shorts or opens using a DVM ohm meter

 

[danny davis]

Yes, But I want to get rfredel techniques and point of view on this subject

Do you troubleshoot shorts when the power is off or on and what is your approach please?

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Yes, But I want to get rfredel techniques and point of view on this subject

Do you troubleshoot shorts when the power is off or on and what is your approach please?