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TSMC 65nm Substrate Issues

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Puppet123

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Hello,

I am using TMSC 65nm process and to know how to make substrate contacts for layout in this process.

Do I just make a P+ connection on a PWELL unit cell and the connect this cell liberally on my layout ground plane ?

Any other suggestions, issues or tips ?

Thank you.
 

quyleanh

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In my opinion, you just need to do that.

If your circuit has BJT which has more than one VSS connections, for example normal VSS and VSSPS connected to collector. Then pay attention that the substrate is needed to connect with VSSPS instead of VSS.
 

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