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Trouble with designing digital power supply analog part

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Newbie level 4
Aug 27, 2009
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Hi there,
I'm designing a digital bench power supply and i got some problems at the analog part of it .
Here is my specs : 2 PWM filtered for 0-5V linear output and 1 dual DAC witch gives me 0-4.096V and I used voltage dividers on booth to drop at 0-2.5V , voltage dividers are normal value resistors ...
Max output : 2 x 25V at 2.5A (this is why I chosed for 0-2.5V )
What i'm scared off is that if I use 0-2.5V to control my operational amplifiers I can get more noise in it thinking about : 10mA output will be controlled by 10mV from DAC or PWM , 1.52V output controlled by 152mV.
I think my problem can be resolved in 2 ways : I let the first design in place letting the ground PCB plane handle noise , or I redesign the PWM voltage dividers for 0-4.096V witch will cause using wired divider resistors , powering operational amplifiers that amplify current value at 7-8V (4V from oamp will never be got without decent voltage cus of voltage drop) , and this will only approximately double the noise resistance .
There will be much difference between noise rejection of 0-2.5v and 0-4.096V ?
Any tip is good .

Sorry for bad english :oops:

I've seen 4 digital power supply's models , 3 using operational amplifiers and that from where I can't trust because the controller set voltage and current in the same time.
My problem is to know if choosing low voltage control 0-2.5V will be more easy to disturb than 0-5v , 0-2.5v more easy to achieve than 0-5v (because 0-4.096V dac) , 3mV disturbance is the maximum I can take for 0-2.5v and 6mV for 0-5V or 0-4.096V .
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