Transistor Sizing for given fan out??

[xstal]

Hi friends,

I want to learn how to size my inverter (or a nand gate) for a fan out of 4. i.e my gate has to drive 4 similar gates. I know how to size the transistors of a given gate for equal drive capability(i.e equal drive of pull up and pull down networks). Please help me in this regard.

Thanks,

 

[manish12]

what is the prob it is after all cmos to cmos.
use one pmos as pullup that will increaes the fanout capability.
but at this time i isnt calculate the size but it should be little big than other.

 

[rakesh1234]

u can refer to this book
Logical Effort: Designing Fast CMOS Circuits (The Morgan Kaufmann Series in Computer Architecture and Design)

 

[xstal]

Hello Rakesh,

Thanks for your reply. Can you please upload soft copy of the book if you have it? Please tell me where can I get the soft copy of the book from?

Thanks,

 

[caplash_vlsi]

u can try looking at rabaey....a very gud explanation and derivation is given in it....

 

[rakesh1234]

this the link for
soft copy of the book logical effort by sudherland.pdf

else u can find it from www.ebooksclub.org

 

[HenryLai]

stage 1 W/L = X . stage 2 W/L=3X


0.25 0.35 Logic Process