TL494 DCDC converter wide range input issues

[Zac1]

With a help of few people I managed to design fairly wide range DCDC converter using TL494

I confirmed it works in range of 30-190V DC
Has fairly stable 12V output with ~40mV peak to peak noise
Can deliver up to 3A.

However it has one fatal flaw that haunts me in my dreams. It kills mosfet Q5 and diode D2 if you suddenly apply 160V+ (high dV/dt)
It does work properly if slowly raising voltage across 40-190V. Also works up until 140V (sudden turn on).

I have managed to capture the problematic moment on thermal camera

https://imgur.com/CHKR4Ew

Basically there is a full short on Q5 and D2 for a moment, then fuse pops and both components have dead short. I have tried to remedy this situation with help of PNP clamp (Q1) but it doesn't do much. I am out of ideas how to fix this... perhaps the driver is at fault? Or maybe diode is too slow?

 

[KlausST]

" C12 relies on empty output capacitors and can only be charged with (negative) current through L1. "

the current is not negative.

Thanks for pointing it out. Yes, you are right. Don´t know how I came to this conclusion.

also - what does this mean ?
" The power supply for sure has a current limit on power up. "

The datasheet for the BSS126 says: 7mA min current .. up to absolute maximum of 85mA pulse current.
This means it takes time to charge the capacitor. and 85mA @ lets say 150V gives a huge 12.75W.
For 150V the SOA shows a max of 65mA .. but only for 10us.

Again: "at power up", this means the output is considered much below 12V, so there is no current flow through D6.

Klaus

 

[KlausST]

Hi,

I totally agree with EasyPeasy.
If the gate driver starts delayed (caused by slowly rising VCC), then
* the internal soft start can´t work properly (I mean it works, but in the time when the driver does not yet work. So it´s useless)
* the integrator in feedback loop will be charged .. causing an overshot (because it needs output_overvoltage to discharge)

My recommendation is to build an external soft start, by ramping up VRef (1) slowly.
(I´m referring to schematic of post#1)
There are several ways:
One of the simplest is to connect a 220uF across R10.
This causes the feedback_VRef to ramp up slowly. Thus the voltage regulation setpoint is not yet at 100% when the driver starts to work

Other options:
* speed up VCC rise at power up (reduing capacitors, adding speed up capacitors, increasing current...)
* adding power supply monitors that shut down VRef (1) when VCC is not yet completely up
* or limit integrator_C voltage by adding diodes to avoid runaway

(1): the Ref voltage for the feedback loop

Analyzing the feedback loop signals would proof the caus of fail as well as workaround.

Klaus

 

[Zac1]

p.s. the gate drive chip only starts to operate when it gets 10V on its supply - this is why you don't see much happening until this 10V level is reached,

if you had read the data sheet you would have been aware of this.

10V is reached pretty much immediately. I have tested this circuit many many many times. I don't see much happening for first 10-80ms simply because of soft start. Previous version starts immediately. And it was bad, sof start already helps a lot.

Another difference between pcb V1 and V2 is the power of startup circuit. If i desolder D6, V2 will continue to operate, both TL494 and driver will operate JUST powered by startup circuit. Depletion fet will get hot but it will work. Already tested that. As a result, what's on the output doesn't matter at all (i mean TL494 will try hardest to keep up).

Please don't take this the wrong way - but looking at the heat signature in the zener - is about as opposite as you can get to designing a power supply properly

What heat signature? I specifically marked zener with P0 marker, I hope you don't mean that 1k resistor that is right next to it? Because zener itself doesn't heat up, maybe jumps 1C then gets heated by resistor.

The engineering approach is to observe the Vout & error amp output at start up, and adjust the control loop accordingly such that it is fast enough ( and with just enough gain ) to keep the overshoot to a couple of volts max at startup & max Vin - also with the speed-up circuit on the Vsense

I have been observing FB pin while playing with cap, thing is, calculated values point to value ~22nF -> ~600nF, unfortunately i do not have many values in that range so I had to order more. Which means I will continue to try to dampen it. But 100nF already did good job.

* the internal soft start can´t work properly (I mean it works, but in the time when the driver does not yet work. So it´s useless)

That is not what is happening. I can't stress that enough but startup circuit built on depletion fet works marvelously. It delivers enough power for entire circuit for unlimited amount of time (at least until it reaches high temp and die but that would take at least dozens of minutes). If you really want to see it i can disconnect D6 and show you guys.

One of the simplest is to connect a 220uF across R10.
This causes the feedback_VRef to ramp up slowly. Thus the voltage regulation setpoint is not yet at 100% when the driver starts to work

Thank you for that suggestion, this is certainly something i can try! Once i get capacitors I ordered.

* adding power supply monitors that shut down VRef (1) when VCC is not yet completely up

I thought about that but I am kind of running out of space on PCB.

As it stands right now, current test version works pretty well. I tested like 50 startups on various voltages between 120-190V with minimal heat flare. I have also prepared a photo with explanation of current PCB. Nerevmind the mess and flux, I did so many tests on it i couldn't bother to clean up.

I apologize in advance for any confusion I may have caused:

 

[KlausST]

Hi,

That is not what is happening. I can't stress that enough but startup circuit built on depletion fet works marvelously.

The thread is so lenghty one can not read every single post ...

Thus I wrote "IF the gate driver starts delayed..." with the emphasys on "IF" ...

From some of your scope pics it looks like switching does start delayed.
For the problem it does not matter what causes the delay. The delay may cause a problem in combination with the integrator part of your regulation loop.
If (again: "if") the soft start causes this delay, then one needs either to adjust the soft start or the regulation loop.

So to find out: Did you already post scope pictures of the regulation loop signals? If yes, can you just tell me which post#.

Klaus

 

[KlausST]

Hi,

Why Q1?
Why R8 = 1k and much much higher?
Why no bigger C12?
What´s the switching frequency?
What´s the duty cycle range (min / max)?

Show the PCB layout (especially the destroyed parts and all around them)

Did you check signals with a scope?

Klaus

 

[Zac1]

Hi,

Why Q1?
Why R8 = 1k and much much higher?
Why no bigger C12?
What´s the switching frequency?
What´s the duty cycle range (min / max)?

Show the PCB layout (especially the destroyed parts and all around them)

Did you check signals with a scope?

Klaus

Q1 to act like strong clamp
R8 is actually 3.3k, i had issues with 1k res
C12 because calculated this value according to LTspice, can't really answer the question why not bigger.
Switching frequency is 200kHz
Duty cycle is irrelevant, from what I can tell, mosfet died before TL had a chance to even boot.

There was no time to scope anything, as soon as power supply got turned on, mosfet got toasted and entire circuit got changed to big short circuit.

I do however have a comparison how normal boot looks like (VIN <= 140V):
https://cdn.discordapp.com/attachme...691016a53ac88f1c501cc185e0340d0638747d1ec97f&

And here is video what happens at VIN 160V:

https://cdn.discordapp.com/attachme...a747eb6398a285a313d5948025c3c36ca281fd4d2b8f&

So my current guess

 

[D.A.(Tony)Stewart]

Can you export a schematic suitable for simulation?

You might need NTC thermal protection for booting then bypass.

 

[Zac1]

Can you export a schematic suitable for simulation?

You might need NTC thermal protection for booting then bypass.

I tried to simulate this in LTSpice but it is so finicky that small changes causes LTSpice to throw errors, nevertheless i attach ltspice and probably all its models in zip file (may need to change path to IRS21271.lib as it is full path) :

 

[Easy peasy]

What is the actual output diode ? a 300V rated part or greater ? ( it should be ),

this issue is common with the design approach you have chosen here,

the main fet turns on briefly for high dV/dt applied at power up,

a common solution is a separate circuit to hold the mosfet off ( < 1 ohm G-S )

during power up, this could even be a very small relay, ( or opto and xtor )

when relay is energised, G-S is free to operate, then allow gate drive.

Also your mosfet, at 200V - this is sailing too close to the wind - applying 150 - 190VDC could well be damaging it if there is any type of L-C ckt in the input - if there is - the V can easily ring up to higher than 200V ( basic LC physics ) = poof !

Also test your boot strap supply circuit separately with 190VDC suddenly applied - it may be putting out too may volts very briefly, also the dv/dt may be affecting the gate driver - giving a short ( or longer ) output pulse that over-currents the mosfet ( charging output caps )

EP.

--- Updated Mar 17, 2024 ---

Also - 200kHz is optimistic - if your gate drive is not perfect the switching losses go up with Vin and current - if the mosfet is not super well connected to a suitable heatsink ( much larger than just the pcb pad ) - then it will overheat at some point and go bang

The diode can also contribute to sw loss heating - depending on what type it actually is (?)

100kHz will halve the sw losses

The video of the temp shows the above all too well.

A screen shot of the source to gnd volts at 20nS / div would be instructive for turn on and off !

--- Updated Mar 17, 2024 ---

Also - as the fet gets hotter - its R-ds-on goes up ( at least doubles here ) - and for constant current waveform - then its heating goes up ( at least doubles ) and you get thermal run-away ( seen in video )

also the Vgs-thres falls at the temp goes up - and this can be a bad thing for imperfect gate drive,

please note carefully the graphs from the data sheet:

 

[Zac1]

What is the actual output diode ? a 300V rated part or greater ? ( it should be ),

Every part is as in schematic in first post, so SS520F, 200V, you think this could be a problem?
To be perfectly clear, LTSpice sim has approximate parts, first post has real schematic that i soldered onto PCB.

during power up, this could even be a very small relay, ( or opto and xtor )

Do you have example of such circuit? Unfortunately relay is probably not going to fit. I just have some space for couple smd components at most.

Also - 200kHz is optimistic - if your gate drive is not perfect the switching losses go up with Vin and current - if the mosfet is not super well connected to a suitable heatsink ( much larger than just the pcb pad ) - then it will overheat at some point and go bang

I did check it with scope, it is 200kHz

This is the output of TL494, driver mirrors that pretty well.

100kHz will halve the sw losses

But switching is really not a problem, once it is running, even at 190V, output is stable and whole circuit stays relatively cool (32 degree)

Take a look at first video, mosfet isn't even remotely getting close to being warm let alone hot. There is a little flare on output zener but that goes away quickly.
If you compared that to second video (failure) zener D5 does not light up, which means output is not getting close to 12V.

I am not sure how can i explain it better, but in simple terms, whole circuit behaves completely different when running at 140V vs 160V. And when it is working (<=140V) nothing gets hot.

 

[Easy peasy]

Also - is D1, the bootstrap diode 300V or greater and ultra fast ? ( Oh - I now see it is only just 200V rated - too low )

Also - the BSS126 at 700 ohm rated appears too small for the work required of it, you want a 1 amp part at least, also well heatsunk.

I see the SS520F main buck diode is 200V rated - this is too low for an 190V application - also it needs to be very well heatsunk.

you can see in the video - the diode heats 1st - because its reverse current goes up at it gets hotter, as do its sw losses - this causes the fet to heat and it goes too:

 

[Zac1]

Also - is D1, the bootstrap diode 300V or greater and ultra fast ? ( Oh - I now see it is only just 200V rated - too low )

Also - the BSS126 at 700 ohm rated appears too small for the work required of it, you want a 1 amp part at least, also well heatsunk.

I see the SS520F main buck diode is 200V rated - this is too low for an 190V application - also it needs to be very well heatsunk.

you can see in the video - the diode heats 1st - because its reverse current goes up at it gets hotter, as do its sw losses - this causes the fet to heat and it goes too:

What could you recommend instead of D1 ? Would ST5L300 work?

BSS126 is depletion mode transistor, it is suppose to deliver enough current for driver and TL494 to start switching, then it turns off seeping only like 150nA.
It does that but but i must say, there is a possibility it may be a little underpowered, however how can you explain it works just fine up to 140V?

Yes as for SS520F i did have some suspicion since it flared up first.

 

[Easy peasy]

the key elements have been explained for everything above - just read it again but this time much more slowly & carefully.

--- Updated Mar 18, 2024 ---

" But switching is really not a problem, once it is running, even at 190V, output is stable and whole circuit stays relatively cool (32 degree) "

" but in simple terms, whole circuit behaves completely different when running at 140V vs 160V. And when it is working (<=140V) nothing gets hot. "

these two statements contradict each other - but they correlate well with the explanation given - and the video.

your heat-sinking appears to be non existent, the voltage ratings of the critical parts is too low, the gate drive transitions are unknown, the peak volts on the circuit due to input filter ring up from step application of Vin is also unknown. 15v would be better as a GD supply voltage. The action of the booststrap supply at fast power up is unknown.

How long does the ckt actually go for at 190Vin ? before it overheats ?

--- Updated Mar 18, 2024 ---

p.s. look up what optimistic means on a google dictionary

 

[Zac1]

these two statements contradict each other - but they correlate well with the explanation given - and the video.

I did not state myself clearly.

So there are 2 states in which this DCDC operates

Boot and normal operation

In normal operation under light load no matter the input voltage, it does not heat up beyond 35C even after hours.
There is no problem whatsoever in "normal operation".

The only problem is during boot so initial 0.5s after first applying voltage and if VIN >160V it ends up badly for mosfet and diode.

How long does the ckt actually go for at 190Vin ? before it overheats ?

Indefinitely. I did test it extensively while raising voltage from 90->190.

I probably should have mentioned this but this step down is designed to work with circuit that draws absolute max of whooping 4W (0.33A). Which means it has massive headroom. If i wanted to draw 3A continuously, I would need some cooling.

As for the bootstrap you are probably right and BSS126 may not be enough, which could potentially be the cause of extended boot time.

I also simulated bootstrap, attaching ltspice files

 

[Easy peasy]

Also - this part can only source 200mA to turn the fet on - this is too low for 200kHz operation, the output needs to be fully buffered by an emitter follower pair;

data sheet shows the 200mA limit,

also there is no max dV/dt listed in the data sheet for this part - which is a bad sign, at fet turn off if the falling dV/dt on the source is too great it may affect the ability of the driver to turn the fet off properly. Put a 4u7 MLCC across the high side power pins on the IC as well as your 220nF

EP

--- Updated Mar 18, 2024 ---

" I also simulated bootstrap, attaching ltspice files "

simulation does not cut it for the real world - test the real thing - but disable the power fet ( short G-S )

--- Updated Mar 18, 2024 ---

Have you implemented the standard soft start on the TL494 ? if not - this would be a good thing to do, otherwise the start up transient current through the fet and diode will be quite high while Cout charges at 95% duty cycle from the TL494 until the feedback loop catches up ( too late ) - and worse at higher Vin.

--- Updated Mar 18, 2024 ---

a diode across R6, is a good idea.

 

[Easy peasy]

Also the dead time pin should be set to 1.6V this sets the max pwm to ~ 48% which is enough for the 30V in to 12V out ( 41% pwm )

but will lower the start up stresses compared to flat out at hard power up - a proper soft-start will lower them still more

 

[D.A.(Tony)Stewart]

The LTspice glitches are from ideal parts PS & Caps with 0 ESR leading to time steps too small and megawatts or kW of pulses.

Too many errors matching simulation to your build.

I guess the std cap. library is too small to match them.

 

[KlausST]

Hi,

How does Q2 work?
Why D6?
Still miss the PCB layout..

Klaus

 

[D.A.(Tony)Stewart]

To perfect the simulation to match your design, will permit optimizing the design for each part, but that takes more time than a soft-start design.

To choose ESR in supply, you may need the load regulation value to estimate ESR.
For the Caps you need an RLC meter which may be easier.
Guessing ESR will just lead to more phantom simulation issues but 0 ohms is a definite no-no.

But if you don't have 2 sq.in of Cu per watt on board for the FET and diode each, it's going to fry, even with soft-start with a 50W load.
Otherwise it could be (?)(100'C/W without.

While your at it, the VFB dividers are drawing a few watts, so scale up x10R.