[ARM] timer and interrupt with stm32f407vgt6

#include "stm32f4xx.h"

static unsigned int flag=0 , i=0 , j=0 ;
static unsigned int	output_3[34]={0,5,9,21,37,57,79,103,127,152,176,198,218,233,245,252,255,
									255,252,245,233,218,198,176,152,127,103,79,57,37,21,9,5,0};

static unsigned int timing[8] = {32,64,97,128,159,191,223,255};



void TIM3_IRQHandler(void)
{
  
	if( i>33 )
		i=0;
	if( flag==1 && (i==25 || i==8 ) ){
		flag=0;
		TIM3->ARR = timing[j];
	}
	GPIOD->ODR = output_3[i++];	
	
	TIM3->SR = 0x00; 
}

void TIM2_IRQHandler(void)
{
	j++;
	if(j>7)
		j=0;
  flag=1;
  TIM2->SR = 0x00; 
}


int main(void)
{
  
 	RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; 	// enable the clock to GPIOD
 	RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;		// enable the clock to timer3
 	RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;		// enable the clock to rimer2
  
	NVIC->ISER[0] |= 1<< (TIM3_IRQn); // enable the TIM3 IRQ
	NVIC->ISER[0] |= 1<< (TIM2_IRQn); // enable the TIM2 IRQ
	
	GPIOD->MODER = 0X5555;
	GPIOD->OTYPER = 0X0000;
	GPIOD->OSPEEDR = 0XFFFF;
	GPIOD->PUPDR = 0X0000;
	
	TIM3->PSC = 0x0000;
	TIM3->DIER |= TIM_DIER_UIE; // enable update interrupt
	TIM3->ARR = timing[j];
	TIM3->CR1 |= TIM_CR1_ARPE | TIM_CR1_CEN ; // autoreload on, counter enabled
	TIM3->EGR |= TIM_EGR_UG; // trigger update event to reload timer registers
	TIM3->SR = 0x00;
	
	TIM2->PSC = 0x4f00;
	TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt
	TIM2->ARR = 0x9fff;
	TIM2->CR1 |=  TIM_CR1_CEN |TIM_CR1_URS; // autoreload on, counter enabled
	TIM2->EGR = 1; // trigger update event to reload timer registers
	TIM2->SR = 0x00;
	while (1);
	
}