I have a problem in the choice of Worst Case concerning the differential Comparator and the OTA design .
Can you tell me about the use of the SS or FF for these two designs.
Thanks.
First, I am still designing both a comparator and OTA used in a pipeline ADC. Since I am doing all analyses regarding the design procedure of such circuits, I would like to know which simulation model (SS, FF, SF, FS of TSMC model) should I consider in my analyses concerning both OTA and comparator, so that to consider the worst case study?
We met a very strange situation in the post-sim of modulus divider, "SS" and "FF" was able to work very well, however, "TT" failed to work, what's wrong?
Mostly all the process corners are important. Sometimes when you are designing any current stages, FS and SF will be hit badly. So all the process corners are important.
Coming to the other question,
We met a very strange situation in the post-sim of modulus divider, "SS" and "FF" was able to work very well, however, "TT" failed to work, what's wrong?
I do not think things could go wrong in TT when SS and FF are fine. Try and run a statistical simulation and find out whether that is the case. Your fab should also have some statistical models.
We met a very strange situation in the post-sim of modulus divider, "SS" and "FF" was able to work very well, however, "TT" failed to work, what's wrong?