zhangljz
Member level 5

Hello,
I am designing a PLL, and the capacitor of the loop filter is using a finger capacitor(~200pf). But in the PDK, the finger capacitor is built on top of a nwell.
I think the nwell is used to isolate substrate noise, right?
But what voltage should I apply to this nwell, leave it floating or connect to VDD?
If connect it to VDD, then I need a quiet VDD which I don't have.
Somebody can help?
Thanks
I am designing a PLL, and the capacitor of the loop filter is using a finger capacitor(~200pf). But in the PDK, the finger capacitor is built on top of a nwell.
I think the nwell is used to isolate substrate noise, right?
But what voltage should I apply to this nwell, leave it floating or connect to VDD?
If connect it to VDD, then I need a quiet VDD which I don't have.
Somebody can help?
Thanks