the pipeline in VLSI circuits,

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aliakbar1988

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Any body know the advantages of the pipeline in VLSI design ?
any relation between pipeline system and globally asynchronous and locally synchronous circuit?
 

pipeline is able to use only one clock signal (phi) comparing to NORA and Zipper which need two clock signals (phi and phi-invert), so the clock skew problem is mush less and dynamic pipeline circuits are able to work with high frequency clock signals.
 

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