the pipeline in VLSI circuits,

[aliakbar1988]

Any body know the advantages of the pipeline in VLSI design ?
any relation between pipeline system and globally asynchronous and locally synchronous circuit?

 

[mazdak]

pipeline is able to use only one clock signal (phi) comparing to NORA and Zipper which need two clock signals (phi and phi-invert), so the clock skew problem is mush less and dynamic pipeline circuits are able to work with high frequency clock signals.