Hello
In case ypur design kit doesnt support mismatch model, you can run corner analysis. In the model card you will find something called "Section" - From ADE, model files..., you will find three files, one for RF models, one for baseband models and one more file..., in each one you will find in front of each model the current sectione.g for nmos :typical, fast or slow. and for passives: mean, max or min. you can make combination of corners for worst case. for example all nmos are fast with min passives, etc .
If mismatch models are supported, use montecarlo simulation with the instances ending with mis e.g "nmos13_mis", or something like that...