I wonder exactly how many sram cells there are in a 51 MCU core.
The data sheet says overlapped 128 upper ram with address 80H~FFH accessed by INDIRECT addressing, while these address space accessed by DIRECT addressing should be SFRs.
So I really puzzled about the Internal RAM and SFRs are exactly uses the same storage cells.
8052 has two pages of upper ram, one, which is directly addressable (SFR Page), other which is indirectly accessible (GPRam), so if you use indirect addressing (eg. through R0 and R1) you actually write to ram, but if you use direct addressing you write to SFR ..
And that is a small catch ..