The HIGH level is the active or asserted output level for the OR gate

[PG1995]

Hi

Please have a look on the attachment. You can find two of my queries there. Thanks for your help.

Regards
PG

 

[lostinxlation]

1. more than 1 hot bits asserts output.
2. Just a terminology.

 

[yura717]

your Q1: >=1 means OR gate. The OR gate implements logical disjunction.This style used in Russia and Europe Union (IEC Symbol)
your Q2: Logic 1 is active signal for OR gate: high level input will change OR gate output to high level state.