Hi members,
Recenty I discovered a very interresting tool for Mixed signal design: Smash. It is a very powefull tool.
I need to know the advantage of that tool compared to HSPICE, HSPICE RF (synopsys) and Eldo ?
Any documentation/tutorial regarding the tool will be highly welcomed.
I know this tool since 1995 and could compare it over the years to Spectre, Eldo, HSpice and Hsim.
It could not match to the specific strengths of the others but it is feature rich and very productive.
Its own strength is the single core mixed and multilanguage implementation, an integrated enviroment with netlist editor features, good waveform and so on.
The biggest drawback are the competitors which force in companion with the fabs the market leader. My wish would be alternative fab kits w/o leader dominance. Then there is also a way for more innovative tools like Smash.
I was happy to see that they implement the node impedance listing and subcircuit power consumption summary 3 years after my feature request. But my company actual does not use it now.
Its own strength is the single core mixed and multilanguage implementation, an integrated enviroment with netlist editor features, good waveform and so on.
Can it export the netlist from the schematic editor in a spice-like (or hspice-like) format so that one can quickly compare results against spectre, hspice or other simulators ?
Its own strength is the single core mixed and multilanguage implementation, an integrated enviroment with netlist editor features, good waveform and so on.
Can it export the netlist from the schematic editor in a spice-like (or hspice-like) format so that one can quickly compare results against spectre, hspice or other simulators ?
There was a multi-year plan to fully support all relevant languages for AMS descriptions and we encounter differences in VerilogA on Spectre to Smash implementations.
VerilogA is one of the later languages to be supported. And the language feature list is what you have to look for.
So the dream of a single database with various simulators still does not work. Also pure spice and the models lacks compatibility in detail. But to be honest also Eldo and Spectre are in incompatible in some manner.
Its own strength is the single core mixed and multilanguage implementation, an integrated enviroment with netlist editor features, good waveform and so on.
Can it export the netlist from the schematic editor in a spice-like (or hspice-like) format so that one can quickly compare results against spectre, hspice or other simulators ?