Can anybody help me on step by step testing of FPGA board for FPGA IO Clocks working and DDR communications..
I am new to this and hence need step by step understanding of this. As a normal hardware person I need certain things like checking powersupplies and if they are reaching ot all the parts of the board correctly or not..
But I do not have exposure to testing DDRII comunications and DACs communication testing part.
Try to use boundary-scan software like Scanseer to probe (and toggle) FPGA pins. Scanseer can record waveforms for FPGA I/Os, so you can see how your communication signals running.