test pattern generation with the help of two dimensional array in VHDL

[jincyjohnson]

I want to know about the 2 D array in VHDl.In clock1 , a johnson codeword is generated.In clock2 the johnson codewords xor with a seed.This is done for all johnson codewords.first codeword xor with bit 0 of seed, 2nd codeword xor with s1 of seed and so on.For this whether we have to generate first the codewords ,then store it in an array or whether we have to xor each generated codewors just after its generation. How can we do this using VHDL