BojackHorseman
Newbie level 6
I want to simulate the code for a seven segment display but I am not getting how to write the test bench for the same. I generate the test bench using ISE Xilinx but when I simulate by giving input values SEG and AN are shown XXXXXX(in red) in the simulation waveform.
Code:
Can someone help me in writing the test bench for the code or give me some hints as to how to write a test bench for this code.
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Code:
Code:
module sseg(
input clk_100MHz, // Nexys 3 clock
input [3:0] ones, // ones value of the input number
input [3:0] tens, // tens value of the input number
input [3:0] hundreds, // hundreds value of the input nnumber
input [3:0] thousands ,// thousands value of the input number
output reg [6:0] SEG, // 7 Segments of Displays
output reg [3:0] AN // 4 Anodes Display
);
// Parameters for segment patterns
parameter ZERO = 7'b000_0001; // 0
parameter ONE = 7'b100_1111; // 1
parameter TWO = 7'b001_0010; // 2
parameter THREE = 7'b000_0110; // 3
parameter FOUR = 7'b100_1100; // 4
parameter FIVE = 7'b010_0100; // 5
parameter SIX = 7'b010_0000; // 6
parameter SEVEN = 7'b000_1111; // 7
parameter EIGHT = 7'b000_0000; // 8
parameter NINE = 7'b000_0100; // 9
// To select each digit in turn
reg [1:0] anode_select;
reg [16:0] anode_timer;
// Logic for controlling digit select and digit timer
always @(posedge clk_100MHz) begin // 1ms x 4 displays = 4ms refresh period
if(anode_timer == 99_999) begin // The period of 100MHz clock is 10ns (1/100,000,000 seconds)
anode_timer <= 0; // 10ns x 100,000 = 1ms
anode_select <= anode_select + 1;
end
else
anode_timer <= anode_timer + 1;
end
// Logic for driving the 4 bit anode output based on digit select
always @(anode_select) begin
case(anode_select)
2'b00 : AN = 4'b1110; // Turn on ones digit
2'b01 : AN = 4'b1101; // Turn on tens digit
2'b10 : AN = 4'b1011; // Turn on hundreds digit
2'b11 : AN = 4'b0111; // Turn on thousands digit
endcase
end
always @*
case(anode_select)
2'b00 : begin
case(ones)
4'b0000 : SEG = ZERO;
4'b0001 : SEG = ONE;
4'b0010 : SEG = TWO;
4'b0011 : SEG = THREE;
4'b0100 : SEG = FOUR;
4'b0101 : SEG = FIVE;
4'b0110 : SEG = SIX;
4'b0111 : SEG = SEVEN;
4'b1000 : SEG = EIGHT;
4'b1001 : SEG = NINE;
endcase
end
2'b01 : begin
case(tens)
4'b0000 : SEG = ZERO;
4'b0001 : SEG = ONE;
4'b0010 : SEG = TWO;
4'b0011 : SEG = THREE;
4'b0100 : SEG = FOUR;
4'b0101 : SEG = FIVE;
4'b0110 : SEG = SIX;
4'b0111 : SEG = SEVEN;
4'b1000 : SEG = EIGHT;
4'b1001 : SEG = NINE;
endcase
end
2'b10 : begin
case(hundreds)
4'b0000 : SEG = ZERO;
4'b0001 : SEG = ONE;
4'b0010 : SEG = TWO;
4'b0011 : SEG = THREE;
4'b0100 : SEG = FOUR;
4'b0101 : SEG = FIVE;
4'b0110 : SEG = SIX;
4'b0111 : SEG = SEVEN;
4'b1000 : SEG = EIGHT;
4'b1001 : SEG = NINE;
endcase
end
2'b11 : begin
case(thousands)
4'b0000 : SEG = ZERO;
4'b0001 : SEG = ONE;
4'b0010 : SEG = TWO;
4'b0011 : SEG = THREE;
4'b0100 : SEG = FOUR;
4'b0101 : SEG = FIVE;
4'b0110 : SEG = SIX;
4'b0111 : SEG = SEVEN;
4'b1000 : SEG = EIGHT;
4'b1001 : SEG = NINE;
endcase
end
endcase
endmoduleCan someone help me in writing the test bench for the code or give me some hints as to how to write a test bench for this code.
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