Nov 14, 2006 #1 H haneet Full Member level 3 Joined Nov 7, 2006 Messages 160 Helped 14 Reputation 28 Reaction score 1 Trophy points 1,298 Activity points 2,219 can any1 tell me how is SystemC different from SystemVerilog
Nov 16, 2006 #2 Z zhangpengyu Full Member level 3 Joined Jun 28, 2004 Messages 172 Helped 2 Reputation 4 Reaction score 1 Trophy points 1,298 Activity points 1,164 systemc is standard c++ with systemC lib,which is good for high level modeling such as algorithms systemverilog is from verilog and vera,so it/s good for verification
systemc is standard c++ with systemC lib,which is good for high level modeling such as algorithms systemverilog is from verilog and vera,so it/s good for verification