Synthesizing Modelsim-encrypted (.vp) files

[omara007]

Hi folks

Is it possible to synthesize Modelsim-encrypted Verilog files (.vp) using Synopsys DC, RTL compiler or Xilinx ISE? I'm trying with Xilinx but I can't get to load the files in the navigator.

Regards

 

[FvM]

*.vp files are using a Modelsim specific secret key and can't be processed by other tools. If you think about the purpose of simulation file encryption, it should be clear, why.

 

[omara007]

Frankly speaking, encryption protects the source code from being stolen ... still, theoretically, one can synthesize it without being able to view what's inside or modify. Very similar to dealing with binary files representing an IP.

Do you have any reference talking about ModelSim .vp characterization?

 

[FvM]

encryption protects the source code from being stolen ... still, theoretically, one can synthesize it without being able to view what's inside or modify.

That's true. The other purpose of encryption is not to allow synthesis of an IP without a respective license. For this reason, different encryption tools with synthesis related license keys are mostly used by synthesis tools.

*.vp encryption can be generated by a ModelSim command, that's all what I know about it, it's described in the reference manual.

 

[miles.sherman]

That's true. The other purpose of encryption is not to allow synthesis of an IP without a respective license. For this reason, different encryption tools with synthesis related license keys are mostly used by synthesis tools.

*.vp encryption can be generated by a ModelSim command, that's all what I know about it, it's described in the reference manual.

I know this is an old thread but I recently came across the need to do exactly this. My solution was:

1. Encrypt the files with NCVerilog into .vp encryption format (IEEE IP200X) and include these files in my simulation scripts.
2. Encrypt the files into another directory with Synopsys synenc tool (these are synthesizeable with Design Compiler) and include these files in my synthesis scripts.

Not exactly ideal but it did the trick. Hope this helps someone.