I have a design with 32-bits period counter. After implementation, I see the following INFO message and hence my period counter does not count the period of its input signal !!! Does any one have an idea how to solve this issue?
Kind replies and hlps are in advance appreciated.
Code:
[Synth 8-5396] Clock pin C has keep related attribute (keep/mark_debug/dont_touch) which could create extra logic on its net ["D:/Xilinx/Ring_Oscillator_Design/REF_design2/REF_design2.srcs/sources_1/imports/sources/period_counter.vhd":34]
You've assigned a KEEP attribute to the signal which prevents the tool from optimizing that signal. If you really want to keep that signal, then don't worry too much about the warning.