Synplify warning, Removing instance.... because .....

[ls000rhb]

synplify warning removing

hi all
Can you help me to resolve this warning
In my design, there is a clock_divider module to divide source clock to multiple clocks to use in other modules.
When running synthesis in Synplify, a warning show " Removing instance u_clock_divider of view:work.clock_divider(verilog) because there are no references to its outputs.
I don't know what this warnings means.
how to resolve this warning?

Thanks & Best Regards

 

[tspen]

synplify warning

show your code ,please

 

[vlsi_whiz]

removing instance

This warning occurs because the instance u_clock_divider is not connected properly. The instance has its output ports open or floating and is not connected. Thus the synthesis tool thinks that is instance is not needed and will remove it when synthesizing.

To prevent such behavior, make sure all the instance's ports are properly connected.