1. Asynchronous and synchronous refer to whether the SRAM modules have their communications synchronized to match the processor (synchronous = "we're in tune with the processor", asynchronous = "we're not in tune with the processor").
"asynchronous" SRAM can introduce wait states into data transfers.
2. SRAM can be synchronous, or asynchronous. Asynchronous SRAM is not dependent on the clock frequency of the CPU, while synchronous SRAM synchronizes with the CPU clock speed.
3.Synchronous memory design offers several advantages over
asynchronous memory design. Simpler timing requirements allow
synchronous memory to operate at much higher frequencies, resulting in
higher memory bandwidth. Synchronous operation is not prone to errors
because signals are registered on clock edges, simplifying the design
process. A write-enable control circuit is not required because the memory
block controls the write strobe generation, saving on resource usage and
simplifying the design. Additionally, synchronous memory consumes
little standby power.
whereas Asynchronous memory requires that you create a
write enable control circuit to generate a pulse every time a write
operation occurs. You must consider write address setup and hold time
and data setup and hold time on the rising and falling edge of the write
enable pulse. The write enable must toggle on every write operation, as
the address cannot change while the write enable is active.