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Suggest Simulators detecting race conditions-digital, analog, microControllers/ASICs?

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louarnold

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I assume there are only SPICE based simulators of which Tina and LTSpice are best known. But they don't all simulate micro-controllers or ASICs, as I understand it. There appears to be work-around software, but its not clear if they link into other simulators.

The real goal here is the detection of race conditions - e.g. inherent delays that cause blips in controlling down-stream circuitry. What simulators can do this?

Should have added...software for both Windows 7 and Linux Mint (Ubuntu)?
 
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louarnold said:
I assume there are only SPICE based simulators of which Tina and LTSpice are best known. But they don't all simulate micro-controllers or ASICs, as I understand it. There appears to be work-around software, but its not clear if they link into other simulators.

The real goal here is the detection of race conditions - e.g. inherent delays that cause blips in controlling down-stream circuitry. What simulators can do this?

Should have added...software for both Windows 7 and Linux Mint (Ubuntu)?
Click to expand...

I am confused by your post and your terminology. Please try to explain what you are after. A 'software' to detect race conditions? In what, in ASICS? In software? Huh?

FYI SPICE is an electrical simulator, with an amazing level of precision. When it comes to ASICs, there is no way to get more precise than that. Spice can expose race conditions. What you can't do is a full chip SPICE simulation, as that is not feasible.
 

Racing condition in simulation can be well treated by using the "#1" in RTL code.
 

What does that mean "#1 in RTL code"?

- - - Updated - - -

ASICs are app on a chip such as temperature sensor. Want to simulate those. Race condition are by circuitry surrounding ASICs, supporting ASICs/micros, latching micro outputs at pin outs.
 

louarnold said:
What does that mean "#1 in RTL code"?

- - - Updated - - -

ASICs are app on a chip such as temperature sensor. Want to simulate those. Race condition are by circuitry surrounding ASICs, supporting ASICs/micros, latching micro outputs at pin outs.
Click to expand...

See, your terminology makes no sense. That's why you got the #1 remark, which is a simulation trick ASIC designers use.
 

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