Substrate Loss and Resistivity of TSMC's 65nm Process

Status
Not open for further replies.

Hamed94

Junior Member level 1
Joined
Apr 19, 2017
Messages
18
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
172
Hi all,

I want to design and simulate passive components for TSMC's 65nm process. I have its substrate information, e.g. thickness and resistivity of the different metal layers, thickness and relative permittivity of the different dielectric layers and so on.

However, I didn't find substrate resistivity and loss, i.e. tanδ, of different dielectric layers.
How can I find these parameters?
Do you know any dissertations or Theses that can help me?

Thanks in advance
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…