Structures for power on reset circuits

[Tianlei]

Power on reset

Hi,

To design a power on reset circuit with accurate threshold and good TC.
One structure I know: Bandgap + resistor ladder+ comparator
Is there any other structure?

In addition, if the circuit only responses to a pulse wider than 30us, it seems that the 30us need a very large capacitor. Is there any circuit achitecture which does not need large capacitor?

Could you pls give your suggestion or some reference paper?

Thanks in advance
Tianlei

 

[SolarTorch]

Re: Power on reset

You can use the reset IC like Maxim

h**p://www.maxim-ic.com/products/supervisors/simple_resets.cfm

 

[Tianlei]

Re: Power on reset

I want to design the power on reset circuit in IC. so I want to know the detail structure.


Thanks
Tianlei

 

[Ipanema]

Re: Power on reset

Hi,

You can try using RC delay network, with external capacitor so that you can adjust the pulse width and a schmitt trigger at the next stage.

Good luck!

 

[IanP]

Re: Power on reset

You can copy internal circuit of the 74123 from 74-series books.
This IC always generates pulse on power-on and the pulse with can be determined by C or R...

 

[jswei303]

Re: Power on reset

hi
you might use a digital counter to enlarge the reset pulse.
As I know, it might fit your requirement

 

[xwcwc1234]

Re: Power on reset

Hi ,
As I know the reset IC using bandgap is the most popular accounted for the variation of process , supply voltage and temperature drift . But the chip size may got a little big .Other circuit using R/C may have larger variation in process , I think.

 

[arsenal]

Power on reset

So far as i know, as long as the power on reset signal has been generated, then the pulse width can be easily extended by using some other logic,
it will not be a problem

 

[electronrancher]

Power on reset

the methods i've seen most use RC-type circuit for delay. but instead of large R, very long L mosfet is used to make a trickle current. maybe 1/100 or so. This is smaller than a resistor.

 

[piao]

Power on reset

you can use a counter to get the 30us delay!

 

[DaBiz]

Re: Power on reset

You might want to be careful with PoweronReset circuits cause if they dont work you may have big problems latter on

make sure the Bandgap is powerup up before the POR triggers so make it active low and kept low during powerup or brown out.

choose a level sensitive ciruit not edge sensitive, that is dont look for a transient on the power supply such as a rising edge as the power supply comes up cause high probability the POR will not have powered up correctly.

be careful with the accuracy of the bandgap. Absolute accuracy is say 1.2+/-20ishmV plus say 50 to 100ppm/C over temp

 

[andy1]

Re: Power on reset

A digita counter can solve your problem but might end up costing more. Caps are not that expensive anyway.

 

[serdes]

Re: Power on reset

oscillator+counter+comparator

 

[ccw27]

Re: Power on reset

Can anyone provide more detail on the circuit used for on chip power on reset? Typically there is a comparator with one input coming from a resistor/capacitor divider and the other from the bandgap. What is the circuit topology used for the comparator? And what is the output of the comparator (reset?), where does it go?

Thanks

 

[ambreesh]

Re: Power on reset

I shall tell what i have used.
1. A resistor devider. One of the resistors must be adjustable.
2. A BGR
3. A comparator with internal hystersis. With one input frpm BGR and other from resistor devider.
4. Assume BGR is negative input and resistor devider is positive input. When supply hits its positive threshold, comparator output goes high.
5. this output goes to a switch that connects a current source to a capacitor.
6. Capacitor is shorted to ground by a switch which is controlled by the first comparator output.
7. Charging of the capacitor determines the delay time.
8. Feed the output of the capacitor and BGR to anaother comparator. Once the cap charges beyond BGR voltage the POR is deasserted.

 

[lastdance]

Re: Power on reset

i am surprised some mentioned counter for simple task like this.
u consider the tradeoffs: circuit complexity, power consumption, noise(if u aren't careful).., y would one want a counter for 30us delay.
Do the math, using few hundred nAs, it would require only 1-2pF to get 30us.
What structures do you use to realise the capacitor?
Is 1-2pF big in your chip?

 

[ccw27]

Re: Power on reset

Hi ambreesh,

3. A comparator with internal hystersis. With one input from BGR and other from resistor devider.
4. Assume BGR is negative input and resistor devider is positive input. When supply hits its positive threshold, comparator output goes high.

What value do you typically set for positive threshold? Do you have to worry about negative threshold for POR?

Thanks

 

[wuwuwengong]

Power on reset

could you show me the structure of Bandgap + resistor ladder+ comparator

 

[ambreesh]

Re: Power on reset

Dear wuwuwengong,
Could you please elaborate.
Do you wnat a schematic for the complete POR, or something else.
I have uploaded some papers for POR searct in IEEE study papers. Maybe that would help

 

[incol]

Re: Power on reset

I shall tell what i have used.
1. A resistor devider. One of the resistors must be adjustable.
2. A BGR
3. A comparator with internal hystersis. With one input frpm BGR and other from resistor devider.
4. Assume BGR is negative input and resistor devider is positive input. When supply hits its positive threshold, comparator output goes high.
5. this output goes to a switch that connects a current source to a capacitor.
6. Capacitor is shorted to ground by a switch which is controlled by the first comparator output.
7. Charging of the capacitor determines the delay time.
8. Feed the output of the capacitor and BGR to anaother comparator. Once the cap charges beyond BGR voltage the POR is deasserted.

dear ambreesh
is it means that need another voltage source (.i.e +5v) to let BGR work correctly,this voltage must always higher then threshold so that BGR can supply a threshold voltage. and could you say more about the comparator with internal hystersis,i really dont know about it
thanks