string and line exact definitions

[Binome]

Hi,
I don't understand lines and strings. I want to implement a tree where each node concatenates the strins oh his children and transfer that to his parent but I don't know how to implement that. If you have ideas or examples...
Thanks.

 

[ads-ee]

Hi,
I don't understand lines and strings. I want to implement a tree where each node concatenates the strins oh his children and transfer that to his parent but I don't know how to implement that. If you have ideas or examples...
Thanks.

You want to do this in an FPGA!? This descriptions sounds more like a software program description.

 

[Binome]

Exectly what I think but I need that for an FPGA design.

 

[TrickyDicky]

Those post is too vague to comment on. Have you got an algorithm you're trying to implement in FPGA? have you modelled the design?

 

[shaiko]

I don't understand lines and strings.

Sure you do. You just used them for this post...

The questions are:
1. What EXACTLY do you want to do ?
2. Why do you want to do that with an FPGA ? performance requirements / it's your homework / you suffer from sadomasochistic inclinations, etc...

 

[Binome]

OK, it's my homework and what I first want is something like that:

library ieee; 
use ieee.std_logic_1164.all;

entity comp is
  port(
    i1 : in string(1 to 8); 
    i2 : in string(1 to 8);
    output : out string(1 to 16)
  );
end comp;

architecture rtl of comp is
begin
  output <= i1 & i2;
end rtl;

But I'm not sure if the best is to handle strings or lines and what difference there is.

 

[FvM]

As for "exact definition", string is an array of character, both are VHDL standard types. Line is an access type defined in textio package.

The shown entity is legal VHDL but almost useless, just creating 128 bit wires between input and output ports.

Question is what you want to achieve, what are string data source and sink, which data do the strings hold, do you intend variable length?

 

[Binome]

This entity is just a simple example to explain the need but it will be different for the final version.
Data come from another instance of the same entity (size is not correct in that example, it would be a generic). It would hold characters and the component would manage fixed length strings first (maybe variable length in the end).

 

[barry]

Unless I'm missing something, it sounds like what you're asking is to take two arrays(call them strings, if you like) and then create another array whose length is the sum of the length of the input arrays. Is that correct?

"Best to handle strings or lines". What does that mean? How do you define "better"? As explained, lines are used for text io.

 

[TrickyDicky]

This entity is just a simple example to explain the need but it will be different for the final version.
Data come from another instance of the same entity (size is not correct in that example, it would be a generic). It would hold characters and the component would manage fixed length strings first (maybe variable length in the end).

If the
This is a real design, you would not use string types, or character type. You should be using some usual type like bstd_logic_vector. As for a string, your would be storing such a thing in a memory.

If this is just some kind of simulation model, turn use strings by all means, but your description is still rather vague. Please elaborate.

 

[Binome]

I need it to be implemented in a real FPGA so I will think about using std_logic_vector but it's not for now as I have other things to do first. I'll let you know if I have other questions...