Hi,
* I see no true GND plane.
* why confusing multiple names for one single node: GND, ACL, GND_Symbol...
* What is D2 good for?
* be sure there is no floating signal (no microcontroller I/O must be left floating)
* J1 --> J3: It seems the load current travels a long way across the whole PCB ... maybe even underneath the microcontroller.
* C5 has lengthy wiring .. not to a clean GND point, but to a dirty load current trace.
* C2 has lengthy wiring with unknown path
A nowadays PCB layout is not "just connecting pins".
It needs a careful concept, considering
* Clean GND and dirty GND (especially when stray inductance at a switching node will cause ground bounce at the microcontroller)
* clean signals and dirty signals in general. (especially when power switching signals (with high dV/dt and high dI/dt) will cause crosstalk, interference, coupling ...on sensitive signals)
* HF regarding EMI/EMC.
Klaus