Static Timing Analysis - Synopsys & Cadence

[carrot]

incentia timecraft market share

Hi

In Synosys, Prime Time is there for Static Timing Analysis(STA)
What about in Cadence, Is it possible to do STA with Buildgates or any other tool is required?

 

[coolrak]

Synopsys PT is the industry standard for STA and is the only sign-off tool.

Cadence also has a tool called PEARL for STA and even in Buildgates you can so

STA.But it has limitations and the important thing is it is not signoff.

 

[carrot]

Hi Coolrak,

What is this sign-off tool?
What is its importance? What it has to do with STA?

 

[coolrak]

A tool is called sign-off, if it is widely used in industry and the results generated by the

tool is consistent with post silicon results. So for STA PrimeTime is the most widely

used and foundry people like to get the design signed off with PT that there is no

timing violations using PrimeTime.


For physical verification Calibre is the sign-off tool

 

[aravind]

Use RTL compiler from cadence.
it is very power synthesis /STA tool from cadence

 

[straw]

now ,STA is important,because the sequial is assured by STA.and lots of manufauture use Pt, except IBM,IBM has their own tools

 

[anjali]

many are using STA for timing analysis. its a powerfull tool.

 

[coolrak]

Is there any tool called STA in the market???

 

[aravind]

no tool in the name of STA.
only PrimeTime from synopsys is the sign-off tool in industry.
it is industry and fab std for STA signoff

 

[verilog_coder]

Does mentor provide any such tool??

 

[cheelgo]

I don't thinkd Mentor provide such kind of sign-off tool.

 

[zhustudio]

RTL compiler and SOC Encounter has a timing engine called Common Timing Engine (CTE). It is powerful. Cadence said it can be sign-off tool for TSMC and other many foundries. We use CTE for timing. It is fine. PT is more pessimistic than CTE. Anyway, the silicon is fine. So we can trust CTE.

 

[coolrak]

Mentor has a tool called SSTVelocity for STA. There are other good tools but I can tell

one thing. In a recent survey Synopsy PrimeTime has got 98% market share in the

Industry

 

[Kulprashant]

Hi,
it depends on the requirements of the projects.

Synopsys : Prime Time
cadence : Common Time Engine (CTE)
Magma : Blast fusion (not sure)

I worked on CTE and it is one of the best tool but still Prime Time is used by all company.

Prashant

 

[Manjunatha_hv]

Hello,


Incentia Time Craft is also one of the good STA tool...

**broken link removed**


TimeCraft™

--------------------------------------------------------------------------------

TimeCraft is a full-chip, gate-level static timing analyzer (STA). It can be used for timing verification at any stage in the design process and for final timing signoff, as shown in the Figure below.

TimeCraft offers rich sign-off features for analyzing a large variety of design applications, including, networking, wireless, communications, chip-sets, and consumer electronics.

---manju---

 

[incisive]

Yes there is a tool called Static Timing Analyzer, But it is inbuilt in Xilinx FPGA Tool, Donno if it is seperatley availaible.

 

[AlexWan]

The result of CTE can be signoff directly. There are some sucessful examples in Cadence.

 

[maks10]

what abt the timing engine in design compiler

 

[carrot]

Hi,

Is Common Time Engine(STA tool) of cadence a part of Buildgates or is it a separate tool, Because we have access to buildgates, but i don't know how to do STA. Can anyone who have done STA please guide me. I need to know what are all the things that i should look for in STA. Is is only Setup and Hold time? or anything else.

 

[ankit12345]

Do i need to learn DC before learning PT??
If not how far i should have knowledge of DC?

Thanks in advance