libraryieee;useieee.std_logic_1164.all;useieee.numeric_std.all;entity p_test isport(
en :instd_logic;
arst :instd_logic;
clk :instd_logic;
dout :outstd_logic_vector(3downto0));end p_test;architecture arch of p_test issignal counter :unsigned(3downto0);beginprocess(en,clk)beginif arst = '1' then
counter <=(others=>'0');elsif(rising_edge(clk))thenif en = '1' then
counter <= counter +1;endif;endif;endprocess;
dout <=std_logic_vector(counter);end arch;
But i want to start counting with the first tick of CLK. I know what i need - low front of CLK (CLK = '0') before EN = '1'. Is there another way?