hi all,
i want to implement a start-up circuit for widlar bandgap.
i know that V2 must be at least one Vbe volt so that Vref will be stable to 1.4V. Two condition when V2=Vbe.
1) when i ramp Vcc from 0V, there is a state where QG16 still in cutoff and V2 follows Vref and V2 reached Vbe.
2) when Vcc continue ramp up, QG16 and QG15 fwd active, thus V2=Vbe, and Vref stablize.
how do i implement start-up to by-pass 1st condition ??
thanks in advance.
can you tell me the role of the QG20 ?for biasing?
rgds,
chu