[STA] Tech libraries

[ivlsi]

Hi All,

As for the Post-P&R STA, we use RC-extraction to calculate delays in the Netlist. As far as I know, the RC-extraction file includes all the timing arcs in the design (including intrinsic/internal delays inside of the cells)...

So, do we still need to use tech libs (*.lib) in the Post-P&R STA? Why?

Thank you!

 

[oratie]

You are wrong. RC-extraction file (SPEF, SBPF ...) includes only RC values of the wires. Seems, you have confused it with SDF file. This file contains all timing info, but it was generated based on RC-extraction file + STA with .lib files.

 

[ivlsi]

you have confused it with SDF file

Exactly! I mixed them up (unfortunately)!

So, if I only have RC-extraction files, then I would also need the tech *.lib/*.db files for the Post-P&R STA... But, if I have Post-P&R SDF then I don't need the tech files... Correct? Or do I still need them since they include capacitance/transition/fanout/etc restrictions/constraints?

What's better - using the RC-extraction files or just SDF for the Post-P&R STA? It's too slow to read RC-extraction files into the tools, isn't?

Do the tools translate the RC-extractions once when they read them inside or they calculate delays each time they need to analyze the next the timing paths?

Thank you!

 

[hoanglongroyal]

Generally, SDF be just used for simulation and it just contain only delay(calculate in STA tool and be extracted).when you decide that generate SDF,normlly, design's STA passed. If you reload SDF into STA stage.i think it just use for review.