STA-- how to analyze the design with no clock registers

[ajaygudi]

STA-- no clock registers

Hi,
I am doing timing analysis for the Scan mode operation.
I have done with all the initial things and I have generated reports also.
In my design I have some registers which are not clocked.

Please let me know how to analyze the design with no clock registers.
Thanks
Ajay

 

[Nir Dahan]

STA-- no clock registers

What do you mean no clocks? SR latches? FF or Latches which use a different signal on the clock pin?

In general STA checks from a register clock (launching point) to the next register clocked by the same clock (capture register)

If you got some asynch. stuff where edged of the capture flop and launch flop are arbitrary (or can be arbitrary) STA has no meaning.

 

[lakshman.ar]

STA-- no clock registers

hi,
do u have ne generated/divided clocks in ur design ?
if so have u declared them as generated clocks ?, cos if u havnt delcared them, then those registers wil not be getting clocks while ur are doin the STA

and second senario is when u have multiple clocks in ur design, make sure tht u use the create_clock for the other clocks as well ... and generate reports seperatly ( incase of async clocks)

lemme kno if more help needed !

lakshman

 

[ljxpjpjljx]

Re: STA-- no clock registers

also make sure the false path !

 

[ajaygudi]

STA-- no clock registers

Hi Lakshman,
In my design clock divider are there.

See I am doing analysis for Scan mode, I just want to know like

The cristal Port will be generating the clock and that clock will go to PLL block which divides the clock.
But Since my design is in Scan mode I cant consider the PLL block clock.

Then how to find out the Clock defination point

 

[sameer_dlh25]

Re: STA-- no clock registers

Aren't you bypassing PLL in SCANMODE ?
For shift from where will you get clock ?