Spectre_simulator : Post layout verification problem

[ghegde]

Hello,
I am facing a problem while doing a post layout simulation of a simple inverter chain.I ran a transient analysis on current through voltage supply node(minus terminal) with an intention to know the current flowing through the circuit at different instant of time.
Below is my Test Bench circuit.

Unfortunately Spectre complains that "Analysis `tran' was terminated prematurely due to an error."I am not able to understand what this error is and how to resolve it.
Also there are errors like "ERROR (CMI-2049): I0.rvdd!_438 of Inv_Chain: Value of `leff' should be greater than zero.".What it means??
I have attached the output log with this post.

Please note that there is no error reported for transient analysis for input signal and out signal.

Any help to understand this issue or to resolve is greatly appreciated.

Thanks in advance,

 

[sarge]

Hello,

Is seems like your extraction tool use real capacitor and resistors instead of pcapacitor and presistor. But I don't shure with it.
Do you have other extraction tools? Assura or calibre maybe...

 

[ghegde]

Sarge,Thanks for the reply.
I am using Mentor Graphics Calibre as PEX.

 

[adwave]

What technology are you using?
I was using 28nm. But when I gave a channel length of less than 60nm, I got the same error.
Anybody knows why?

Thanks!