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SPDT Switch Non-linear Simulation in ADS

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Junior Member level 3
Nov 9, 2008
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I am doing a system level simulation of a transceiver using the harmonic balance test bench in ADS. I would like to know if there is a behavioral model or some other other way of taking the non-linear behavior of the switch (input P1dB) into consideration and also employing the switch option of selecting which path to use. I have not seen any of the switch models in ADS include non-linear parameters.


Switches are generally assumed as Linear and Nonlinear parameters are given as "reference only" in related datasheets. So, simulating a switch that works under max. limits is not a considered issue. You can only define Insertion Loss and Mismatch Loss. Defining nonlinear behavior of such switches is a little bit difficult.

Nonlinearity in CMOS switches has several sources. For RF
switches it's largely about the C-V swing of the S/D parasitic
diode junctions. Which basic MOS models are not great, at.
Fancier RF models can be fitted reasonably and an RFIC
company will do that.

For classic high- / medium-voltage "DC" / low frequency
analog switches, nonlinearity comes from the interplay of
common mode position with the NMOS and PMOS devices'
VT and overdrive, modulating their on-resistance. You'll see
a "bathtub" R-vs-V characteristic, not the flat line that would
be 0% distortion.

In both cases you'd like to add realistic emulation of the cause,
to the circuit. But now you're not strictly "behavioral" anymore.
If you want realism you'll be getting intimate with the transistors.
At least until you can boil the sap down to a sweet behavioral

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