spartan 3e starter kit memory test fails
Are you writing to a single memory location in the DDR DRAM or multiple locations. If you are writing to a single location, then it is possible that the data is still on the bus which you immediately read back. If you are writing to multiple locations and all locations are correct when you read back immediately, but fail after some time, then it sounds like the controller in the FPGA is not running the DRAM refresh cycles.
DDR DRAMs require proper setup through the mode register commands before they will operate. They are not just power up and go devices. The controller code within the FPGA needs to be compiled with the proper DRAM settings for the devices included in your board. Without these settings, the DRAM will not be properly initialized and will never work. Make sure that these parameters are being passed into the controller. Look at your Synthesis warnings to make sure that it is not just taking some arbitrary default values.
Did the Starter Kit come with any demo bit files? If it has a memory demo bit file, you could load this to at least test the board.