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Thanks for the point....if u don't mind can u please elaborate....
I know there will be some circuitry inside the pads...So is that space we r providing is for making the connections for the Pad circuitry....??
Is it for providing Power/Gnd for those Pads...????
The design rules from the foundry should come with guidelines on pad<->core spacing for SI, xtalk and other electrical reasons. Saying what exactly you're violating or what exactly will go wrong if your core area is too close to your IO area is tough to say. Is your design DRC clean?