kaiserschmarren87
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I have to implement Hamming Code ECC to Single Port RAM and True Dual Port RAM. At the moment 32/64/128 bit HC ECC has been implemented but takes more resources. I know that there is Built-In ECC and Soft ECC for Simple Dual Port RAM and I do not see for Single Port RAM and True Dual Port RAM in the CoreGen.
My question is: Is there a Built-In ECC or Soft ECC for Single Port RAM and True Dual Port RAM using coregen(I am asking just to make sure that I haven't made any mistake while checking it)? Or are there any tweaks or techniques which could help me to get it done on Single Port RAM and True Dual Port RAM? I would like to avoid manually written 32/64/128 bit HC ECC or is it the only solution for me now?
I referred to this document: https://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v8_2/pg058-blk-mem-gen.pdf
Just need some information regarding this.
My question is: Is there a Built-In ECC or Soft ECC for Single Port RAM and True Dual Port RAM using coregen(I am asking just to make sure that I haven't made any mistake while checking it)? Or are there any tweaks or techniques which could help me to get it done on Single Port RAM and True Dual Port RAM? I would like to avoid manually written 32/64/128 bit HC ECC or is it the only solution for me now?
I referred to this document: https://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v8_2/pg058-blk-mem-gen.pdf
Just need some information regarding this.
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