SNDR problem about my 3rd order delta sigma modulator

[Schmitt001]

Hi,everyone!
I have built a 3rd order feedforward delta sigma modulator in spectre, the fully differential opamp, comparator, d_ff are all implemented by veriloga model, while the switch are CMOS transmission gate.
My question is the SNR calculated from the spectre output is only 33dB, while in Simulink the SNDR is 103dB, i don't know how to solve the problem for many days! Could anyone help me? Thanks

 

[helpmejerry]

I would suggest you extend the transient simulation time so you have at least 2^16 samples of BS. Export the BS and do an FFT. For example with a 2 MHz clock for 2^16 you need a simulation time of aprox. 32.8 ms.

BR Jerry