SNDR in Current Steering DAC

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lvbenqiang123

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Hi all ,

Resently I have simulated the SNDR of a 12b Current sterring DAC ,but it is only 54dB, thus the enob is 9bit . Simulation by Cadence without mc model.

So, I'm very confused why the DAC's SNDR was so bad ?

Can anyone give me some help?

By the way, How to tradoff the transistors' size of current source for the Statics and Dynamic performance ?
 

What are your sampling and input frequency? Have You any big glitches? DAC is single ended or differential?
 

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