Analysis of Switched-Capacitor Common-Mode
Feedback Circuit
Ojas Choksi, Member, IEEE, and L. Richard Carley, Fellow, IEEE
it says "CM loop should be comparable to that of the differential loop to avoid output signal distortion resulting from clipping due to slow settling of the output CM voltage."
i think what we interested is the DM voltage, and the CM voltage should be constant(ideal), why it's say ...slow settling of the output CM voltage
i'm confused.
after a sc charge transfer all nodes (also the the cm) have to (re-)settle. hence the cm loop has to settle at least as fast as the dm loop for sc circuits. in continous time circuits even 5 ttimes as a rule of thumb.
hello,
in order to keep the CM voltage not to affect the DM operation, the CM loop should be faster than the DM loop.
so as said in the paper slow settling of the CM loop can lead to the CM affecting the operation of DM, say that the CM settling is slow and it causes the CM to deviate from 0.9V to 1.1V so if ur DM is working with rail output swing this shift in CM will clip the DM signal and cause distortion.
after a sc charge transfer all nodes (also the the cm) have to (re-)settle. hence the cm loop has to settle at least as fast as the dm loop for sc circuits. in continous time circuits even 5 ttimes as a rule of thumb.
I think large CM transition do slow down the DM settling, especially the psuedo differential input. For a fully differential input circuit (or say CM varies little), a slow CM loop is also available.