Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Slewrate Modeling of a Verilog-A Fully Differential Opamp

Status
Not open for further replies.

Vitor Przedzmirski

Newbie level 4
Joined
Feb 2, 2015
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
66
Hello guys,

I am very interested in modeling a fully differential opamp with GBW, Gain and SR limitations, to analyze a 2nd-order SDM. I found the following post very helpful in this case:

Besides that, the slew-rate is not implemented, and I tried to do it, but had no changes in simulation values. I tried to slew the output current using the slew() function.

Does anyone have already tried to do this succesfully? Any hints? Should I, for example, slew the current in the GM branch, instead of the output?

Thanks in advance. :thumbsup:

- - - Updated - - -

Should, I thought i could edit the post to include a link, but I dont know if its possible/ how to do it.

So, the link mentioned above is to the following thread:

https://www.edaboard.com/threads/290282/
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top