brenox
Newbie level 5
spice opus
Hello, I'm trying to simulate a differential amplifier in Spice Opus, but I'm having a problem and I don't know how to solve it.
Here is the code:
-----------------------------------------------
Transistor exp_10_SRv2
* input node 7 e 6
* output node 12
* current source -- 'name' 'from node' 'to node' DC 'value'
Ibias 2 1 DC 20u
* voltage source -- 'name' 'from node' 'to node' DC 'value'
vdd 3 0 DC 3.15V
Vgpwl 0 6 PWL(0 0 0 10 110U 10 110U 0)
* Resistores
R1 13 10 31k
RL 12 0 100k
* Capacitores -- Cname N1(positive node) N2(negative node) Value
Cc 12 11 2p
CL 12 0 10p
* cmos transistors -- 'M#' 'Drain' 'Gate' 'Source' 'Base'
M1 4 12 5 5 MOD1 W=138.0955u L=1u
M2 8 6 5 5 MOD1 W=138.0955u L=1u
M3 4 2 3 3 MOD2 W=8.8385u L=1u
M4 8 2 3 3 MOD2 W=8.8385u L=1u
M5 5 1 0 0 MOD1 W=8.8155u L=1u
M6 9 10 4 4 MOD2 W=5.8923u L=1u
M7 11 10 8 8 MOD2 W=5.8923u L=1u
M8 9 9 0 0 MOD1 W=9.1376u L=1u
M9 11 9 0 0 MOD1 W=9.1376u L=1u
M10 10 1 0 0 MOD1 W=8.8155u L=1u
M11 13 10 14 14 MOD2 W=5.8923u L=1u
M12 14 13 3 3 MOD2 W=5.8923u L=1u
M13 12 13 3 3 MOD2 W=161.9735u L=1u
M14 12 11 0 0 MOD1 W=251.1839u L=1u
M15 2 2 3 3 MOD2 W=8.8385u L=1u
M16 1 1 0 0 MOD1 W=8.8155u L=1u
* BSIM3 models for AMI Semiconductor's C5 process
*
* Don't forget the .options scale=300nm if using drawn lengths
* and the MOSIS SUBM design rules
*
* 2<Ldrawn<500 10<Wdrawn<10000 Vdd=5V
* Note minimum L is 0.6 um while minimum W is 3 um
* Change to level=49 when using HSPICE
.options scale=300nm
.MODEL MOD1 NMOS ( LEVEL = 53 VERSION = 3.1 TNOM = 27 TOX = 1.39E-8 XJ = 1.5E-7 NCH = 1.7E17 VTH0 = 0.6696061 K1 = 0.8351612 K2 = -0.0839158 K3 = 23.1023856 K3B = -7.6841108 W0 = 1E-8 NLX = 1E-9 DVT0W = 0 DVT1W = 0 DVT2W = 0 DVT0 = 2.9047241 DVT1 = 0.4302695 DVT2 = -0.134857 U0 = 458.439679 UA = 1E-13 UB = 1.485499E-18 UC = 1.629939E-11 VSAT = 1.643993E5 A0 = 0.6103537 AGS = 0.1194608 B0 = 2.674756E-6 B1 = 5E-6 KETA = -2.640681E-3 A1 = 8.219585E-5 A2 = 0.3564792 RDSW = 1.387108E3 PRWG = 0.0299916 PRWB = 0.0363981 WR = 1 WINT = 2.472348E-7 LINT = 3.597605E-8 XL = 0 XW = 0 DWG = -1.287163E-8 DWB = 5.306586E-8 VOFF = 0 NFACTOR = 0.8365585 CIT = 0 CDSC = 2.4E-4 CDSCD = 0 CDSCB = 0 ETA0 = 0.0246738 ETAB = -1.406123E-3 DSUB = 0.2543458 PCLM = 2.5945188 PDIBLC1 = -0.4282336 PDIBLC2 = 2.311743E-3 PDIBLCB = -0.0272914 DROUT = 0.7283566 PSCBE1 = 5.598623E8 PSCBE2 = 5.461645E-5 PVAG = 0 DELTA = 0.01 RSH = 81.8 MOBMOD = 1 PRT = 8.621 UTE = -1 KT1 = -0.2501 KT1L = -2.58E-9 KT2 = 0 UA1 = 5.4E-10 UB1 = -4.8E-19 UC1 = -7.5E-11 AT = 1E5 WL = 0 WLN = 1 WW = 0 WWN = 1 WWL = 0 LL = 0 LLN = 1 LW = 0 LWN = 1 LWL = 0 CAPMOD = 2 XPART = 0.5 CGDO = 2E-10 CGSO = 2E-10 CGBO = 1E-9 CJ = 4.197772E-4 PB = 0.99 MJ = 0.4515044 CJSW = 3.242724E-10 PBSW = 0.1 MJSW = 0.1153991 CJSWG = 1.64E-10 PBSWG = 0.1 MJSWG = 0.1153991 CF = 0 PVTH0 = 0.0585501 PRDSW = 133.285505 PK2 = -0.0299638 WKETA = -0.0248758 LKETA = 1.173187E-3 AF = 1 KF = 0)
*
.MODEL MOD2 PMOS ( LEVEL = 53 VERSION = 3.1 TNOM = 27 TOX = 1.39E-8 XJ = 1.5E-7 NCH = 1.7E17 VTH0 = -0.9214347 K1 = 0.5553722 K2 = 8.763328E-3 K3 = 6.3063558 K3B = -0.6487362 W0 = 1.280703E-8 NLX = 2.593997E-8 DVT0W = 0 DVT1W = 0 DVT2W = 0 DVT0 = 2.5131165 DVT1 = 0.5480536 DVT2 = -0.1186489 U0 = 212.0166131 UA = 2.807115E-9 UB = 1E-21 UC = -5.82128E-11 VSAT = 1.713601E5 A0 = 0.8430019 AGS = 0.1328608 B0 = 7.117912E-7 B1 = 5E-6 KETA = -3.674859E-3 A1 = 4.77502E-5 A2 = 0.3 RDSW = 2.837206E3 PRWG = -0.0363908 PRWB = -1.016722E-5 WR = 1 WINT = 2.838038E-7 LINT = 5.528807E-8 XL = 0 XW = 0 DWG = -1.606385E-8 DWB = 2.266386E-8 VOFF = -0.0558512 NFACTOR = 0.9342488 CIT = 0 CDSC = 2.4E-4 CDSCD = 0 CDSCB = 0 ETA0 = 0.3251882 ETAB = -0.0580325 DSUB = 1 PCLM = 2.2409567 PDIBLC1 = 0.0411445 PDIBLC2 = 3.355575E-3 PDIBLCB = -0.0551797 DROUT = 0.2036901 PSCBE1 = 6.44809E9 PSCBE2 = 6.300848E-10 PVAG = 0 DELTA = 0.01 RSH = 101.6 MOBMOD = 1 PRT = 59.494 UTE = -1 KT1 = -0.2942 KT1L = 1.68E-9 KT2 = 0 UA1 = 4.5E-9 UB1 = -6.3E-18 UC1 = -1E-10 AT = 1E3 WL = 0 WLN = 1 WW = 0 WWN = 1 WWL = 0 LL = 0 LLN = 1 LW = 0 LWN = 1 LWL = 0 CAPMOD = 2 XPART = 0.5 CGDO = 2.9E-10 CGSO = 2.9E-10 CGBO = 1E-9 CJ = 7.235528E-4 PB = 0.9527355 MJ = 0.4955293 CJSW = 2.692786E-10 PBSW = 0.99 MJSW = 0.2958392 CJSWG = 6.4E-11 PBSWG = 0.99 MJSWG = 0.2958392 CF = 0 PVTH0 = 5.98016E-3 PRDSW = 14.8598424 PK2 = 3.73981E-3 WKETA = 5.292165E-3 LKETA = -4.205905E-3 AF = 1 KF = 0)
.control
tran 1u 110u
plot 12
.endc
.end
-----------------------------------------------
And this is the error log:
SpiceOpus (c) 22 -> source exp_10_SRv2.cir
Fatal error: BSIM3: mosfet m15, model mod2: Effective channel length <= 0
doAnalyses: No such parameter on this device
tran simulation(s) aborted
I've tried to change the length of the M15 transistor but it did not resolve the problem. The same error keep coming. I've seen something about respecting Leff=Ldraw-2LD, but i did not understand. Do I have to change the W/L relation or just increase the W and L? But I already increased them and appeared the same problem.
Any reply will be appreciated!
Hello, I'm trying to simulate a differential amplifier in Spice Opus, but I'm having a problem and I don't know how to solve it.
Here is the code:
-----------------------------------------------
Transistor exp_10_SRv2
* input node 7 e 6
* output node 12
* current source -- 'name' 'from node' 'to node' DC 'value'
Ibias 2 1 DC 20u
* voltage source -- 'name' 'from node' 'to node' DC 'value'
vdd 3 0 DC 3.15V
Vgpwl 0 6 PWL(0 0 0 10 110U 10 110U 0)
* Resistores
R1 13 10 31k
RL 12 0 100k
* Capacitores -- Cname N1(positive node) N2(negative node) Value
Cc 12 11 2p
CL 12 0 10p
* cmos transistors -- 'M#' 'Drain' 'Gate' 'Source' 'Base'
M1 4 12 5 5 MOD1 W=138.0955u L=1u
M2 8 6 5 5 MOD1 W=138.0955u L=1u
M3 4 2 3 3 MOD2 W=8.8385u L=1u
M4 8 2 3 3 MOD2 W=8.8385u L=1u
M5 5 1 0 0 MOD1 W=8.8155u L=1u
M6 9 10 4 4 MOD2 W=5.8923u L=1u
M7 11 10 8 8 MOD2 W=5.8923u L=1u
M8 9 9 0 0 MOD1 W=9.1376u L=1u
M9 11 9 0 0 MOD1 W=9.1376u L=1u
M10 10 1 0 0 MOD1 W=8.8155u L=1u
M11 13 10 14 14 MOD2 W=5.8923u L=1u
M12 14 13 3 3 MOD2 W=5.8923u L=1u
M13 12 13 3 3 MOD2 W=161.9735u L=1u
M14 12 11 0 0 MOD1 W=251.1839u L=1u
M15 2 2 3 3 MOD2 W=8.8385u L=1u
M16 1 1 0 0 MOD1 W=8.8155u L=1u
* BSIM3 models for AMI Semiconductor's C5 process
*
* Don't forget the .options scale=300nm if using drawn lengths
* and the MOSIS SUBM design rules
*
* 2<Ldrawn<500 10<Wdrawn<10000 Vdd=5V
* Note minimum L is 0.6 um while minimum W is 3 um
* Change to level=49 when using HSPICE
.options scale=300nm
.MODEL MOD1 NMOS ( LEVEL = 53 VERSION = 3.1 TNOM = 27 TOX = 1.39E-8 XJ = 1.5E-7 NCH = 1.7E17 VTH0 = 0.6696061 K1 = 0.8351612 K2 = -0.0839158 K3 = 23.1023856 K3B = -7.6841108 W0 = 1E-8 NLX = 1E-9 DVT0W = 0 DVT1W = 0 DVT2W = 0 DVT0 = 2.9047241 DVT1 = 0.4302695 DVT2 = -0.134857 U0 = 458.439679 UA = 1E-13 UB = 1.485499E-18 UC = 1.629939E-11 VSAT = 1.643993E5 A0 = 0.6103537 AGS = 0.1194608 B0 = 2.674756E-6 B1 = 5E-6 KETA = -2.640681E-3 A1 = 8.219585E-5 A2 = 0.3564792 RDSW = 1.387108E3 PRWG = 0.0299916 PRWB = 0.0363981 WR = 1 WINT = 2.472348E-7 LINT = 3.597605E-8 XL = 0 XW = 0 DWG = -1.287163E-8 DWB = 5.306586E-8 VOFF = 0 NFACTOR = 0.8365585 CIT = 0 CDSC = 2.4E-4 CDSCD = 0 CDSCB = 0 ETA0 = 0.0246738 ETAB = -1.406123E-3 DSUB = 0.2543458 PCLM = 2.5945188 PDIBLC1 = -0.4282336 PDIBLC2 = 2.311743E-3 PDIBLCB = -0.0272914 DROUT = 0.7283566 PSCBE1 = 5.598623E8 PSCBE2 = 5.461645E-5 PVAG = 0 DELTA = 0.01 RSH = 81.8 MOBMOD = 1 PRT = 8.621 UTE = -1 KT1 = -0.2501 KT1L = -2.58E-9 KT2 = 0 UA1 = 5.4E-10 UB1 = -4.8E-19 UC1 = -7.5E-11 AT = 1E5 WL = 0 WLN = 1 WW = 0 WWN = 1 WWL = 0 LL = 0 LLN = 1 LW = 0 LWN = 1 LWL = 0 CAPMOD = 2 XPART = 0.5 CGDO = 2E-10 CGSO = 2E-10 CGBO = 1E-9 CJ = 4.197772E-4 PB = 0.99 MJ = 0.4515044 CJSW = 3.242724E-10 PBSW = 0.1 MJSW = 0.1153991 CJSWG = 1.64E-10 PBSWG = 0.1 MJSWG = 0.1153991 CF = 0 PVTH0 = 0.0585501 PRDSW = 133.285505 PK2 = -0.0299638 WKETA = -0.0248758 LKETA = 1.173187E-3 AF = 1 KF = 0)
*
.MODEL MOD2 PMOS ( LEVEL = 53 VERSION = 3.1 TNOM = 27 TOX = 1.39E-8 XJ = 1.5E-7 NCH = 1.7E17 VTH0 = -0.9214347 K1 = 0.5553722 K2 = 8.763328E-3 K3 = 6.3063558 K3B = -0.6487362 W0 = 1.280703E-8 NLX = 2.593997E-8 DVT0W = 0 DVT1W = 0 DVT2W = 0 DVT0 = 2.5131165 DVT1 = 0.5480536 DVT2 = -0.1186489 U0 = 212.0166131 UA = 2.807115E-9 UB = 1E-21 UC = -5.82128E-11 VSAT = 1.713601E5 A0 = 0.8430019 AGS = 0.1328608 B0 = 7.117912E-7 B1 = 5E-6 KETA = -3.674859E-3 A1 = 4.77502E-5 A2 = 0.3 RDSW = 2.837206E3 PRWG = -0.0363908 PRWB = -1.016722E-5 WR = 1 WINT = 2.838038E-7 LINT = 5.528807E-8 XL = 0 XW = 0 DWG = -1.606385E-8 DWB = 2.266386E-8 VOFF = -0.0558512 NFACTOR = 0.9342488 CIT = 0 CDSC = 2.4E-4 CDSCD = 0 CDSCB = 0 ETA0 = 0.3251882 ETAB = -0.0580325 DSUB = 1 PCLM = 2.2409567 PDIBLC1 = 0.0411445 PDIBLC2 = 3.355575E-3 PDIBLCB = -0.0551797 DROUT = 0.2036901 PSCBE1 = 6.44809E9 PSCBE2 = 6.300848E-10 PVAG = 0 DELTA = 0.01 RSH = 101.6 MOBMOD = 1 PRT = 59.494 UTE = -1 KT1 = -0.2942 KT1L = 1.68E-9 KT2 = 0 UA1 = 4.5E-9 UB1 = -6.3E-18 UC1 = -1E-10 AT = 1E3 WL = 0 WLN = 1 WW = 0 WWN = 1 WWL = 0 LL = 0 LLN = 1 LW = 0 LWN = 1 LWL = 0 CAPMOD = 2 XPART = 0.5 CGDO = 2.9E-10 CGSO = 2.9E-10 CGBO = 1E-9 CJ = 7.235528E-4 PB = 0.9527355 MJ = 0.4955293 CJSW = 2.692786E-10 PBSW = 0.99 MJSW = 0.2958392 CJSWG = 6.4E-11 PBSWG = 0.99 MJSWG = 0.2958392 CF = 0 PVTH0 = 5.98016E-3 PRDSW = 14.8598424 PK2 = 3.73981E-3 WKETA = 5.292165E-3 LKETA = -4.205905E-3 AF = 1 KF = 0)
.control
tran 1u 110u
plot 12
.endc
.end
-----------------------------------------------
And this is the error log:
SpiceOpus (c) 22 -> source exp_10_SRv2.cir
Fatal error: BSIM3: mosfet m15, model mod2: Effective channel length <= 0
doAnalyses: No such parameter on this device
tran simulation(s) aborted
I've tried to change the length of the M15 transistor but it did not resolve the problem. The same error keep coming. I've seen something about respecting Leff=Ldraw-2LD, but i did not understand. Do I have to change the W/L relation or just increase the W and L? But I already increased them and appeared the same problem.
Any reply will be appreciated!
