Nov 15, 2006 #1 V vlsi_student Newbie level 4 Joined Sep 7, 2006 Messages 7 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,338 Hello every one I used synopsys DC for synthesis with the option of clock gating .. now i want use model sim for gatel level netlist simulation. can some one please tell as how to proceed .. r please give soem materials which gives info abt this .. thnks a lot in advacne sing
Hello every one I used synopsys DC for synthesis with the option of clock gating .. now i want use model sim for gatel level netlist simulation. can some one please tell as how to proceed .. r please give soem materials which gives info abt this .. thnks a lot in advacne sing