shaiko
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Hello,
I'm trying to simulate a design that uses an ALTPLL (Altera PLL).
This is the entity that uses the "altpll" component.
When I compile the design in modelsim design I get the following errors:
I compiled
"altera_mf.vhd" and "altera_mf_components.vhd" prior that...yet the error does't go away.
What am I doing wrong?
I'm trying to simulate a design that uses an ALTPLL (Altera PLL).
This is the entity that uses the "altpll" component.
Code:
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY new_pll IS
PORT
(
areset : IN STD_LOGIC := '0';
inclk0 : IN STD_LOGIC := '0';
c0 : OUT STD_LOGIC ;
locked : OUT STD_LOGIC
);
END new_pll;
When I compile the design in modelsim design I get the following errors:
# ** Error: C:/new_pll.vhd(42): Library altera_mf not found.
# ** Error: C:/new_pll.vhd(43): near "altera_mf": syntax error
I compiled
"altera_mf.vhd" and "altera_mf_components.vhd" prior that...yet the error does't go away.
What am I doing wrong?