Oct 15, 2017 #1 D DamonKim Newbie level 2 Joined Oct 15, 2017 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 23 Hi I started to design a simple differential amplifier using cadence spectre. I made an amplifier under low power condition. So, input devices are in subthreshold. I got the operating operating point shown below. But, when I tried tran simulation, I got the gain lower than unity. It's much smaller than I expected by hand calculation. I want to know how to deal with this situation. I expected gain by gm*(Ron || Rop) and it's bigger than 10 at least. please help me.
Hi I started to design a simple differential amplifier using cadence spectre. I made an amplifier under low power condition. So, input devices are in subthreshold. I got the operating operating point shown below. But, when I tried tran simulation, I got the gain lower than unity. It's much smaller than I expected by hand calculation. I want to know how to deal with this situation. I expected gain by gm*(Ron || Rop) and it's bigger than 10 at least. please help me.
Oct 15, 2017 #2 F frankrose Advanced Member level 3 Joined Nov 27, 2013 Messages 883 Helped 237 Reputation 472 Reaction score 238 Trophy points 1,323 Activity points 7,820 I think you connected the diff pair into diodes somehow. The vds and vgs voltages are almost the same for the devices. Then the expressions what you wrote aren't true.
I think you connected the diff pair into diodes somehow. The vds and vgs voltages are almost the same for the devices. Then the expressions what you wrote aren't true.
Oct 15, 2017 #3 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,392 Helped 14,748 Reputation 29,778 Reaction score 14,091 Trophy points 1,393 Location Bochum, Germany Activity points 297,965 The waveform voltage levels don't fit the parameters shown in schematic. May be a different DC offset? Show the complete test setup including power supply and biasing, connection of all amplifier terminals.
The waveform voltage levels don't fit the parameters shown in schematic. May be a different DC offset? Show the complete test setup including power supply and biasing, connection of all amplifier terminals.
Oct 17, 2017 #4 W Wheatley Junior Member level 2 Joined Mar 21, 2017 Messages 20 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 150 Could you post the simulation setup and all nodes DC voltages?