Jun 12, 2005 #1 N nemolee Full Member level 3 Joined Dec 28, 2004 Messages 155 Helped 3 Reputation 6 Reaction score 1 Trophy points 1,298 Activity points 1,467 Dear Sir, This example describes an 8-bit signed multiplier with registered I/O in Verilog HDL. Synthesis tools detect multiplier designs in HDL code and infer lpm_mult megafunction. I hope it is useful for you. Best Regards
Dear Sir, This example describes an 8-bit signed multiplier with registered I/O in Verilog HDL. Synthesis tools detect multiplier designs in HDL code and infer lpm_mult megafunction. I hope it is useful for you. Best Regards