sigma delta DAC simulation method ?

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mitgrace

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Dear All :
Now I design a Sigma delta dac, But it need more time to sinulate .
It about 10ms , I use nanosim to do it , Does any one know what method is good
for SDM-DAC design , Any good gold flow or method ? Thanks
 

hi mitgrace,

the first step is design, and then simulating it in system-level using high-level modeling tool, such as matlab simulink, verilogA, etc.. i think modeling sigma-delta dac using simulink is a good method. when in transistor-level cadence's ultrasim is an appropriate tool to fast simulate sigma-delta dac for verification.

luck
 

Dear jiangxb :
If I want to using verilog-A and transitor simulationusing spectre or Ultrasim.
Is it ok ? DO u knwo how to model the current cell using verilog-A , Thanks
 

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