Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have heard of no such rule ..pls make some things clear to me , what are you trying to divide , what is the library that u are using ...does it have a generic division circuit ??? ... can u paste ur piece of code , In all probalities the error is being wrongly interpreted by u .
i am havin a prob when the numerator is smaller than the denominator. if i go for real numbers then it is not synthesizable. here is an example of wat i am tryin to do
(11*1100100*1111101000*1111101000) / (1100100*10*10100000*11)
can u sugeest how i go about this. i have tried some dividers but then i get an error sayin that divesion of powers of 2 is only possible. pls let me know how to go about it
It depends on the algorithm you use I believe that you are using SRT algorithm, sure in SRT algorithm the divisor must be larger than half of the nominator not smaller than half of it as you stated, this can be done with scaling. not only this there is an improved algrithm uses quoitent prediction that reuires a divisor that has an abslute value larger the 7/8 and smaller than 9/8, you will need to do scaling and normalization for this constraint.
I haven't seen anyone that uses SRT algorithms, so I recommend that you use the nonrestoring binary algorithm which is most commonly used in division, because it has a bit precesion per step this makes it suitable for most of DSP application and microprocessors.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
