FIFO must have an array and the output flop that receives the data from the array(usually the output flop is inside the FIFO, but you may have it outside of FIFO). Array is driven by write clock and the output flop is driven by read clock. Output flop captures the data from array when read enable is asserted, therefore, the metastability problem arises when the data from array doesn't get settled before the read enable asserted. Read enable is based on the empty signal, which has at least 2 read cycle latency for synchronization of the write pointer, so that max_delay from all the flops in array to the output flop must be less than 2 read clcok period.
The idea is the same as the domain crossing with handshake and the same max_delay policy as handshake's should be applied to FIFO.